參數(shù)資料
型號: CY7C0853AV-133BBC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: FLEx36™ 3.3V 32K/64K/128K/256K x 36 Synchronous Dual-Port RAM
中文描述: 256K X 36 DUAL-PORT SRAM, 4.7 ns, PBGA172
封裝: 15 X 15 MM, 1.25 MM HEIGHT, 1 MM PITCH, FBGA-172
文件頁數(shù): 17/36頁
文件大?。?/td> 956K
代理商: CY7C0853AV-133BBC
CY7C0850AV,CY7C0851V/CY7C0851AV
CY7C0852V/CY7C0852AV
CY7C0853V/CY7C0853AV
Document #: 38-06070 Rev. *J
Page 24 of 36
Figure 19. Counter Reset[42, 43, 44]
Switching Waveforms (continued)
CLK
ADDRESS
INTERNAL
CNTEN
ADS
DATAIN
ADDRESS
CNTRST
R/W
DATAOUT
An
Am
Ap
Ax
0
1
An
Am
Ap
Q1
Qn
Q0
D0
tCH2
tCL2
tCYC2
tSA tHA
tSW tHW
tSRST tHRST
tSD tHD
tCD2
tCKLZ
RESET
ADDRESS 0
COUNTER
WRITE
READ
ADDRESS 0
ADDRESS 1
READ
ADDRESS An
ADDRESS Am
READ
Notes
42. CE0 = B0 – B3 = LOW; CE1 = MRST = CNT/MSK = HIGH.
43. No dead cycle exists during counter reset. A Read or Write cycle may be coincidental with the counter reset.
44. Retransmit happens if the counter remains in increment mode after it wraps to initially loaded value.
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