參數(shù)資料
型號(hào): CY7C017AV-20JI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM
中文描述: 32K X 9 DUAL-PORT SRAM, 20 ns, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 14/20頁
文件大?。?/td> 301K
代理商: CY7C017AV-20JI
CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
CY7C007AV/017AV
Document #: 38-06051 Rev. *A
Page 14 of 20
Notes:
43. t
HA
depends on which enable pin (CE
or R/W
) is deasserted first.
44. t
INS
or t
INR
depends on which enable pin (CE
L
or R/W
L
) is asserted last.
Switching Waveforms
(continued)
Interrupt Timing Diagrams
Left Side Sets INT
R
:
WRITE FFF (See Functional Description)
t
WC
Right SideClearsINT
R
:
t
HA
READ FFF
t
RC
t
INR
WRITE FFE (See Functional Description)
t
WC
Right SideSets INT
L
:
Left SideClears INT
L
:
READ FFE
t
INR
t
RC
ADDRESS
R
CE
L
R/W
L
INT
L
OE
L
ADDRESS
R
R/W
R
CE
R
INT
L
ADDRESS
R
CE
R
R/W
R
INT
R
OE
R
ADDRESS
L
R/W
L
CE
L
INT
R
t
INS
t
HA
t
INS
(See Functional Description)
(See Functional Description)
[43]
[44]
[44]
[44]
[43]
[44]
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