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參數(shù)資料
| 型號： | CY7B9950AC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 2.5/3.3V, 200-MHz High-Speed Multi-Phase PLL Clock Buffer |
| 中文描述： | 7B SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 7 X 7 MM, 1 MM HEIGHT, PLASTIC, TQFP-32 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 168K |
| 代理商： | CY7B9950AC |
RoboClock
CY7B9950
Document #: 38-07338 Rev. *B
Page 5 of 9
AC Test Loads and Waveforms
DC Specifications @ 3.3V
Parameter
V
DD
V
IL
V
IH
V
IHH[9]
V
IMM[9]
V
ILL[9]
I
IL
I
3
Description
Condition
Min.
2.97
–
2.0
Max.
3.63
0.8
–
–
Unit
V
V
V
V
V
V
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
V
V
V
V
3.3 Operating Voltage
Input LOW Voltage
Input HIGH Voltage
Input HIGH Voltage
Input MID Voltage
Input LOW Voltage
Input Leakage Current
3-Level Input DC Current HIGH, V
IN
= V
DD
3.3V ± 10%
REF, FB and sOE# Inputs
3-Level Inputs
(TEST, FS, nF[1:0], PE/HD) (These pins are normally
wired to V
DD
,GND or unconected.)
V
DD
–
0.6
V
DD
/2
–
0.3 V
DD
/2 + 0.3
–
–
5
–
–
50
–
200
–
100
–
–
–
2.4
2.4
0.6
5
200
50
–
–
100
0.4
0.4
–
–
V
IN
= V
DD
/G
ND
,V
DD
= max. (REF and FB inputs)
3-Level Inputs
(TEST, FS, nF[1:0],
DS[1:0], PD#/DIV, PE/HD)
MID, V
IN
= V
DD
/2
LOW, V
IN
= V
SS
V
IN
= V
SS
, V
DD
= max.
V
IN
= V
DD
, V
DD
= max., (sOE#)
I
OL
= 12 mA (PE/HD = L/H), (nQ[0:1])
I
OL
= 24 mA (PE/HD = MID),(nQ[0:1])
I
OH
=
–
12 mA (PE/HD = L/H),(nQ[0:1])
I
OH
=
–
24 mA (PE/HD = MID),(nQ[0:1])
I
PU
I
PD
V
OL
Input Pull-up Current
Input Pull-down Current
Output LOW Voltage
V
OH
Output HIGH Voltage
I
DDQ
Quiescent Supply CurrentV
DD
= max., TEST = MID, REF = LOW, sOE# = LOW,
outputs not loaded
Dynamic Supply Current
@ 100 MHz
Input Pin Capacitance
–
2
mA
I
DD
C
IN
230
4
mA
pF
Output
20pF
Output
20pF
150
150
VDDQ
For Lock Output
t
OFALL
For All Other Outputs
2.0V
0.8V
VTH =1.5V
t
PWL
t
PWH
t
ORISE
3.3V LVTTL OUTPUT WAVEFORM
≤
1 ns
3.0V
2.5V LVTTL OUTPUT WAVEFORM
≤
1 ns
1.7V
0.7V
VTH =1.25V
t
PWL
t
PWH
t
ORISE
t
OFALL
2.0V
0.8V
0V
VTH =1.5V
≤
1 ns
3.3V LVTTL INPUT TEST WAVEFORM
1.7V
0.7V
0V
VTH =1.25V
≤
1 ns
2.5V
2.5V LVTTL INPUT TEST WAVEFORM
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7B9950ACT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2.5/3.3V, 200-MHz High-Speed Multi-Phase PLL Clock Buffer |
| CY7B9950AI | 制造商:Rochester Electronics LLC 功能描述:2.5V/3.3V 200 MHZ PROGRAMMABLE SKEW CLOCK BUFFER IND TEMP - Bulk |
| CY7B9950AIT | 制造商:Cypress Semiconductor 功能描述:Zero Delay PLL Clock Buffer Single 32-Pin TQFP T/R |
| CY7B9950AXC | 功能描述:鎖相環(huán) - PLL 2.5V/3.3V 200MHz COM Program Skw Clk Bufr RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY7B9950AXCT | 功能描述:鎖相環(huán) - PLL 2.5V/3.3V 200MHz COM Program Skw Clk Bufr RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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