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參數(shù)資料
| 型號： | CY62138FV30LL-45SXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 2-Mbit (256K x 8) Static RAM |
| 中文描述： | 256K X 8 STANDARD SRAM, 45 ns, PDSO32 |
| 封裝： | 0.450 INCH, LEAD FREE, SOIC-32 |
| 文件頁數(shù)： | 5/13頁 |
| 文件大?。?/td> | 930K |
| 代理商： | CY62138FV30LL-45SXI |
Document #: 001-08029 Rev. *E
Page 5 of 13
CY62138FV30 MoBL
Switching Characteristics
(Over the Operating Range)
[11]
Parameter
Description
45 ns
Unit
Min
Max
Read Cycle
t
RC
Read Cycle Time
45
ns
t
AA
Address to Data Valid
45
ns
t
OHA
Data Hold from Address Change
10
ns
t
ACE
CE
1
LOW and CE
2
HIGH to Data Valid
OE LOW to Data Valid
45
ns
t
DOE
22
ns
t
LZOE
OE LOW to Low-Z
[12]
5
ns
t
HZOE
OE HIGH to High-Z
[12,13]
18
ns
t
LZCE
CE
1
LOW and CE
2
HIGH to Low Z
[12]
CE
1
HIGH or CE
2
LOW to High-Z
[12, 13]
10
ns
t
HZCE
18
ns
t
PU
CE
1
LOW and CE
2
HIGH to Power Up
0
ns
t
PD
Write Cycle
[14]
CE
1
HIGH or CE
2
LOW to Power Down
45
ns
t
WC
Write Cycle Time
45
ns
t
SCE
CE
1
LOW and CE
2
HIGH to Write End
Address Setup to Write End
35
ns
t
AW
35
ns
t
HA
Address Hold from Write End
0
ns
t
SA
Address Setup to Write Start
0
ns
t
PWE
WE Pulse Width
35
ns
t
SD
Data Setup to Write End
25
ns
t
HD
Data Hold from Write End
0
ns
t
HZWE
WE LOW to High-Z
[12, 13]
18
ns
t
LZWE
WE HIGH to Low-Z
[12]
10
ns
Notes
11. Test conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less (1 V/ns), timing reference levels of V
CC(typ)
/2, input
pulse levels of 0 to V
CC(typ)
, and output loading of the specified I
OL
/I
OH
as shown in the “
“AC Test Loads and Waveforms” on page 4
” .
12.At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
, t
HZOE
is less than t
LZOE
, and t
HZWE
is less than t
LZWE
for any given device.
13.t
HZOE
, t
HZCE
, and t
HZWE
transitions are measured when the output enters a high impedance state.
14.The internal write time of the memory is defined by the overlap of WE, CE
= V
, and CE
= V
. All signals must be ACTIVE to initiate a write and any of these
signals can terminate a write by going INACTIVE. Reference the data input setup and hold timing to the edge of the signal that terminates the write.
[+] Feedback
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY62138FV30LL-45SXIT | 功能描述:靜態(tài)隨機存取存儲器 SLO 5.0V SUPER LO PWR 128Kx16 靜態(tài)隨機存取存儲器 IND RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62138FV30LL-45XZKJ | 制造商:Cypress Semiconductor 功能描述: |
| CY62138FV30LL-45ZAXA | 功能描述:靜態(tài)隨機存取存儲器 2 MB 256Kb x 8 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62138FV30LL-45ZAXAT | 功能描述:靜態(tài)隨機存取存儲器 2 Mb 256Kb x 8 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62138FV30LL-45ZAXI | 功能描述:靜態(tài)隨機存取存儲器 SLO 5.0V SUPER LO PWR 128Kx16 靜態(tài)隨機存取存儲器 IND RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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