參數(shù)資料
型號: CY62127DV30
廠商: Cypress Semiconductor Corp.
英文描述: 1 Mb (64K x 16) Static RAM
中文描述: 1字節(jié)(64K的× 16)靜態(tài)RAM
文件頁數(shù): 6/12頁
文件大?。?/td> 384K
代理商: CY62127DV30
CY62127DV30
MoBL
Document #: 38-05229 Rev. *D
Page 6 of 12
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)
[16,17]
Read Cycle No. 2 (OE Controlled)
[16,17, 18]
Notes:
16.Device is continuously selected. OE, CE = V
IL
, BHE, BLE = V
IL
.
17.WE is HIGH for Read cycle.
18.Address valid prior to or coincident with CE, BHE, BLE transition LOW.
ADDRESS
DATA OUT
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
相關(guān)PDF資料
PDF描述
CY62127DV30L 1 Mb (64K x 16) Static RAM
CY62127DV30L-55BVI 1 Mb (64K x 16) Static RAM
CY62127BV 64K x 16 Static RAM
CY62127BVLL-55BAI 64K x 16 Static RAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY62127DV30_06 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1-Mb (64K x 16) Static RAM
CY62127DV30_09 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1-Mb (64K x 16) Static RAM
CY62127DV30L 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1 Mb (64K x 16) Static RAM
CY62127DV30L-55BAI 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC SGL 2.5V/3.3V 1MBIT 64KX16 55NS 48FBGA - Bulk
CY62127DV30L-55BAIT 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC SGL 2.5V/3.3V 1MBIT 64KX16 55NS 48FBGA - Tape and Reel