參數(shù)資料
型號: CY62126BV
廠商: Cypress Semiconductor Corp.
英文描述: 64K x 16 Static RAM
中文描述: 64K的× 16靜態(tài)RAM
文件頁數(shù): 7/11頁
文件大?。?/td> 398K
代理商: CY62126BV
CY62126DV30
MoBL
Document #: 38-05230 Rev. *E
Page 7 of 11
Write Cycle No. 1 (WE Controlled
[12, 13,
16, 17, 18]
Write Cycle No. 2 (CE Controlled)
[12, 13,
16, 17, 18]
Notes:
17.Data I/O is high-impedance if OE = V
.
18.If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
19.During the DON'T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
Switching Waveforms
(continued)
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
WC
DATA I/O
ADDRESS
CE
WE
OE
t
HZOE
DATA
IN
VALID
NOTE19
BHE/BLE
t
BW
t
SCE
t
HD
t
SD
t
PWE
t
HA
t
AW
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
ADDRESS
WE
DATA I/O
OE
NOTE 19
BHE/BLE
t
BW
t
SA
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