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參數(shù)資料
| 型號： | CY3930V208-83NTC |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | CPLDs at FPGA Densities |
| 中文描述： | CPLD器件在FPGA的密度 |
| 文件頁數(shù)： | 85/86頁 |
| 文件大?。?/td> | 1235K |
| 代理商： | CY3930V208-83NTC |
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Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
Page 85 of 86
Windows 95, Windows 98, Windows 2000, Windows XP, and Windows NT are trademarks of Microsoft Corporation. ZBT is a
trademark of IDT. QDR is a trademark of Micron, IDT, and Cypress Semiconductor.
Warp
is a registered trademark, and NoBL,
Programmable Interconnect Matrix, PIM, Spread Aware, AnyVolt, Self-Boot, In-System Reprogrammable, ISR, “CPLDs at FPGA
Densities,” True Vertical Migration, and Delta39K are trademarks, of Cypress Semiconductor. All product and company names
mentioned in this document are the trademarks of their respective holders.
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF23
AF24
AF25
AF26
GND
GND
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
GND
GND
NC
V
CCIO3
NC
NC
NC
NC
V
CCIO3
NC
NC
NC
NC
GND
GND
GND
NC
V
CCIO3
NC
IO3
IO3
IO3
V
CCIO3
IO3
IO3
IO3
NC
GND
Table 15. 676 FBGA Pin Table
(continued)
Pin
CY39100
CY39165
CY39200
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY3930V208-83NTI | CPLDs at FPGA Densities |
| CY3930V256-125BBC | CPLDs at FPGA Densities |
| CY3930V256-125BBI | CPLDs at FPGA Densities |
| CY3930V256-125BGC | CPLDs at FPGA Densities |
| CY3930V256-125BGI | CPLDs at FPGA Densities |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY3930V256-125MBC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY3930V256-125MGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY3930V256-181BBC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY3930V256-181MBC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY3930V256-181MGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
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