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參數資料
| 型號： | CY39050V208-125NTXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | LOADABLE PLD, 10 ns, PQFP208 |
| 封裝： | 28 X 28 MM, 0.50 MM PITCH, LEAD FREE, PLASTIC, EQFP-208 |
| 文件頁數： | 33/86頁 |
| 文件大?。?/td> | 2802K |
| 代理商： | CY39050V208-125NTXI |
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Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *I
Page 39 of 86
Note:
17. Refer to the data sheets at www.atmel.com for detailed architectural and timing information.
39K200
181
CY39200V208-181NTC
NT208
208-Lead Enhanced Quad Flat Pack
Commercial
CY39200V208-181NTXC
NT208
208-Lead Lead-Free Enhanced Quad
Flat Pack
CY39200V484-181BBC
BB484
484-Lead Fine Pitch Ball Grid Array
CY39200V388-181MGC
MG388
388-Lead Ball Grid Array
√
CY39200V676-181MBC
MB676
676-Lead Fine Pitch Ball Grid Array
√
125
CY39200V208-125NTC
NT208
208-Lead Enhanced Quad Flat Pack
Commercial
CY39200V208-125NTXC
NT208
208-Lead Lead-Free Enhanced Quad
Flat Pack
CY39200V484-125BBC
BB484
484-Lead Fine Pitch Ball Grid Array
CY39200V388-125MGC
MG388
388-Lead Ball Grid Array
√
CY39200V676-125MBC
MB676
676-Lead Fine Pitch Ball Grid Array
√
CY39200V208-125NTI
NT208
208-Lead Enhanced Quad Flat Pack
Industrial
CY39200V484-125BBI
BB484
484-Lead Fine Pitch Ball Grid Array
83
CY39200V208-83NTC
NT208
208-Lead Enhanced Quad Flat Pack
Commercial
CY39200V208-83NTXC
NT208
208-Lead Lead-Free Enhanced Quad
Flat Pack
CY39200V484-83BBC
BB484
484-Lead Fine Pitch Ball Grid Array
CY39200V388-83MGC
MG388
388-Lead Ball Grid Array
√
CY39200V676-83MBC
MB676
676-Lead Fine Pitch Ball Grid Array
√
CY39200V208-83NTI
NT208
208-Lead Enhanced Quad Flat Pack
Industrial
CY39200V484-83BBI
BB484
484-Lead Fine Pitch Ball Grid Array
Delta39K Part Numbers (Ordering Information) (continued)
Device
Speed
(MHz)
Ordering Code
Package
Name
Package Type
Self-Boot
Solution
Operating
Range
CPLD Boot EEPROM[17] Part Numbers (Ordering Information)
Device
Speed
(MHz)
Ordering Code
Package
Name
Package Type
Operating
Range
2 Mbit
15
AT17LV002-10JC
20J
20-Lead Plastic Leaded Chip Carrier Commercial
10
AT17LV002-10JC
20J
20-Lead Plastic Leaded Chip Carrier
Industrial
1 Mbit
15
AT17LV010-10JC
20J
20-Lead Plastic Leaded Chip Carrier Commercial
10
AT17LV010-10JI
20J
20-Lead Plastic Leaded Chip Carrier
Industrial
512 Kbit
15
AT17LV512-10JC
20J
20-Lead Plastic Leaded Chip Carrier Commercial
10
AT17LV512-10JI
20J
20-Lead Plastic Leaded Chip Carrier
Industrial
Recommended ATMEL CPLD Boot EEPROM for corresponding Delta39K CPLDs
CPLD Device
Recommended boot EEPROM
39K30
AT17LV512
39K50
AT17LV512
39K100
AT17LV010
39K200
AT17LV002
相關PDF資料 |
PDF描述 |
|---|---|
| CY39050V208-233NTXC | LOADABLE PLD, 7.2 ns, PQFP208 |
| CY39050V208-83NTXC | LOADABLE PLD, 15 ns, PQFP208 |
| CY39050V208-83NTXI | LOADABLE PLD, 15 ns, PQFP208 |
| CY39200V208-181NTXC | LOADABLE PLD, 8.5 ns, PQFP208 |
| CY39200V208-83NTXC | LOADABLE PLD, 15 ns, PQFP208 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CY39050V208-181BBC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY39050V208-181BBI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY39050V208-181BGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY39050V208-181BGI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
| CY39050V208-181MBC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities |
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