
CY29946
Document #: 38-07286 Rev. *E
Page 3 of 6
Absolute Maximum Conditions
[2]
Maximum Input Voltage Relative to V
SS
: ............ V
SS
– 0.3V
Maximum Input Voltage Relative to V
DD
:.............V
DD
+ 0.3V
Storage Temperature: ................................–65°C to + 150°C
Operating Temperature:................................–40°C to +85°C
Maximum ESD protection...............................................2 kV
Maximum Power Supply:................................................5.5V
Maximum Input Current: ...........................................± 20 mA
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any
voltage higher than the maximum rated voltages to this circuit.
For proper operation, V
in
and V
out
should be constrained to the
range:
V
SS
< (V
in
or V
out
) < V
DD
.
Unused inputs must always be tied to an appropriate logic
voltage level (either V
SS
or V
DD
).
Notes:
2.
Multiple Supplies:
The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
3. Inputs have pull-up/pull-down resistors that effect input current.
4. Driving series or parallel terminated 50
(or 50
to V
/2) transmission lines.
5. Parameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with loaded outputs.
6. Outputs driving 50
transmission lines.
7. 50% input duty cycle.
8. See
Figure 1
.
9. Part-to-Part skew at a given temperature and voltage.
DC Electrical Specifications:
V
DD
= V
DDC
= 3.3V ±10% or 2.5V ±5%,
o
ver the specified temperature range
Parameter
Description
V
IL
Input Low Voltage
V
IH
Input High Voltage
I
IL
I
IH
V
OL
I
OL
= 20 mA
V
OH
I
OH
= –20 mA, V
DD
= 3.3V
I
OH
= –20 mA, V
DD
= 2.5V
I
DDQ
Quiescent Supply Current
I
DD
Dynamic Supply Current
V
DD
= 3.3V, Outputs @ 100 MHz, CL = 30 pF
V
DD
= 3.3V, Outputs @ 160 MHz, CL = 30 pF
V
DD
= 2.5V, Outputs @ 100 MHz, CL = 30 pF
V
DD
= 2.5V, Outputs @ 160 MHz, CL = 30 pF
Z
Out
Output Impedance
V
DD
= 3.3V
V
DD
= 2.5V
C
in
Input Capacitance
Conditions
Min.
V
SS
2.0
Typ.
Max.
0.8
V
DD
–100
100
0.4
Unit
V
V
μA
μA
V
V
Input Low Current
[3]
Input High Current
[3]
Output Low Voltage
[4]
Output High Voltage
[4]
2.5
1.8
5
7
mA
mA
130
225
95
160
15
18
4
12
14
18
22
W
pF
AC Electrical Specifications
V
DD
= V
DDC
= 3.3V ±10% or 2.5V ±5%,
o
ver the specified temperature range
[5]
Parameter
Description
Conditions
Fmax
Input Frequency
[6]
V
DD
= 3.3V
V
DD
= 2.5V
Tpd
TTL_CLK To Q Delay
[6]
FoutDC
Output Duty Cycle
[6, 7]
Measured at V
DD
/2
tpZL, tpZH
Output enable time (all outputs)
tpLZ, tpHZ
Output disable time (all outputs)
Tskew
Output-to-Output Skew
[6, 8]
Tskew(pp)
Part-to-Part Skew
[9]
Tr/Tf
Output Clocks Rise/Fall Time
[8]
0.8V to 2.0V,
V
DD
= 3.3V
0.6V to 1.8V,
V
DD
= 2.5V
Min.
Typ.
Max.
200
170
11.5
55
10
10
250
4.5
1.0
Unit
MHz
5.0
45
2
2
ns
%
ns
ns
ps
ns
ns
150
2.0
0.10
0.10
1.3