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參數(shù)資料
| 型號： | CY28410 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Clock Generator for Intel Grantsdale Chipset |
| 中文描述： | 時鐘發(fā)生器英特爾Grantsdale芯片 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 281K |
| 代理商： | CY28410 |
CY28410
Document #: 38-07593 Rev. *C
Page 5 of 18
Byte 1: Control Register 1
Bit
7
@Pup
1
Name
PCIF0
Description
PCIF0 Output Enable
0 = Disabled, 1 = Enabled
DOT_96 MHz Output Enable
0 = Disable (Hi-Z), 1 = Enabled
USB_48 MHz Output Enable
0 = Disabled, 1 = Enabled
REF Output Enable
0 = Disabled, 1 = Enabled
Reserved
CPU[T/C]1 Output Enable
0 = Disable (Hi-Z), 1 = Enabled
CPU[T/C]0 Output Enable
0 = Disable (Hi-Z), 1 = Enabled
Spread Spectrum Enable
0 = Spread off, 1 = Spread on
6
1
DOT_96T/C
5
1
USB_48
4
1
REF
3
2
0
1
Reserved
CPU[T/C]1
1
1
CPU[T/C]0
0
0
CPUT/C
SRCT/C
PCIF
PCI
Byte 2: Control Register 2
Bit
7
@Pup
1
Name
PCI5
Description
PCI5 Output Enable
0 = Disabled, 1 = Enabled
PCI4 Output Enable
0 = Disabled, 1 = Enabled
PCI3 Output Enable
0 = Disabled, 1 = Enabled
PCI2 Output Enable
0 = Disabled, 1 = Enabled
PCI1 Output Enable
0 = Disabled, 1 = Enabled
PCI0 Output Enable
0 = Disabled, 1 = Enabled
PCIF2 Output Enable
0 = Disabled, 1 = Enabled
PCIF1 Output Enable
0 = Disabled, 1 = Enabled
6
1
PCI4
5
1
PCI3
4
1
PCI2
3
1
PCI1
2
1
PCI0
1
1
PCIF2
0
1
PCIF1
Byte 3: Control Register 3
Bit
7
@Pup
0
Name
SRC7
Description
Allow control of SRC[T/C]7 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with SW PCI_STP#
Allow control of SRC[T/C]6 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with SW PCI_STP#
Allow control of SRC[T/C]5 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with SW PCI_STP#
Allow control of SRC[T/C]4 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with SW PCI_STP#
Allow control of SRC[T/C]3 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with SW PCI_STP#
Allow control of SRC[T/C]2 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with SW PCI_STP#
6
0
SRC6
5
0
SRC5
4
0
SRC4
3
0
SRC3
2
0
SRC2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY28410ZXC | Paired Cable; Number of Conductors:24; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyvinylchloride (PVC); Number of Pairs:12; Conductor Material:Copper; Features:Traditional Analog Audio Applications RoHS Compliant: Yes |
| CY28410OC | Hook-Up Wire; Conductor Size AWG:22; No. Strands x Strand Size:7 x 30; Jacket Color:Gray; Approval Bodies:UL; Approval Categories:UL AWM Style 1213; Passes VW-1 Flame Test; Cable/Wire MIL SPEC:MIL-W-16878/4 Type E RoHS Compliant: Yes |
| CY28410ZC | Clock Generator for Intel Grantsdale Chipset |
| CY28410ZCT | Clock Generator for Intel Grantsdale Chipset |
| CY28410OCT | Clock Generator for Intel Grantsdale Chipset |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY28410-2 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Generator for Intel Grantsdale Chipset |
| CY284108OXC | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Server, CK410B RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY284108OXCT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Server, CK410B RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY284108ZXC | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Server, CK410B RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY284108ZXCT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Server, CK410B RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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