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參數(shù)資料
| 型號： | CY28409OC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | RF/Coaxial Connector; RF Coax Type:BNC; Contact Termination:Clamp; Body Style:Straight Plug; RG Cable Type:59, 62, 71, 140, 210, 302 RoHS Compliant: Yes |
| 中文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | SSOP-56 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 330K |
| 代理商： | CY28409OC |
CY28409
Document #: 38-07445 Rev. *B
Page 5 of 18
3
Externally
Selected
Externally
Selected
Externally
Selected
Externally
Selected
PCI_STP#
PCI_STP# reflects the current value of the external PCI_STP# pin.
0 =PCI_STP# pin is low.
CPU_STP# reflects the current value of the external CPU_STP# pin.
0 = CPU_STP# pin is low.
FS_B reflects the value of the FS_B pin sampled on power-up.
2
CPU_STP#
1
FS_B
0
FS_A
FS_A reflects the value of the FS_A pin sampled on power-up.
Byte 1: Control Register 1
Bit
7
@Pup
0
Name
Description
SRCT, SRCC
Allows control of SRCT/C with assertion of PCI_STP# or SW PCI_STP
0 = Free Running, 1 = Stopped with PCI_STP#
SRCT/C Output Enable; 0 = Disabled (Hi-z), 1 = Enabled
Reserved, Set = 1
Reserved, Set = 1
Reserved, Set = 1
CPUT/C2 Output Enable; 0 = Disabled (Hi-z), 1 = Enabled
CPUT/C1 Output Enable; 0 = Disabled (Hi-z), 1 = Enabled
CPUT/C0 Output Enable; 0 = Disabled (Hi-z), 1 = Enabled
6
5
4
3
2
1
0
1
1
1
1
1
1
1
SRCT, SRCC
Reserved
Reserved
Reserved
CPUT2, CPUC2
CPUT1, CPUC1
CPUT0, CPUC0
Byte 2: Control Register 2
Bit
7
@Pup
0
Name
Description
SRCT, SRCC
SRCT/C Pwrdwn Drive Mode
0 = Driven during power-down, 1 = Three-state during power-down
SRCT/C Stop Drive Mode
0 = Driven during PCI_STP, 1 = Three-state during PCI_STP
CPUT/C2 Pwrdwn Drive Mode
0 = Driven during power-down, 1 = Three-state during power-down
CPUT/C1 Pwrdwn Drive Mode
0 = Driven during power ‘down, 1 = Three-state during power-down
CPUT/C0 Pwrdwn Drive Mode
0 = Driven during power-down, 1 = Three-state during power-down
CPUT/C2 stop Drive Mode
0 = Driven when stopped, 1 = Three-state when stopped
CPUT/C1 stop Drive Mode
0 = Driven when stopped, 1 = Three-state when stopped
CPUT/C0 stop Drive Mode
0 = Driven when stopped, 1 = Three-state when stopped
6
0
SRCT, SRCC
5
0
CPUT2, CPUC2
4
0
CPUT1, CPUC1
3
0
CPUT0, CPUC0
2
0
CPUT2, CPUC2
1
0
CPUT1, CPUC1
0
0
CPUT0, CPUC0
Byte 3: Control Register 3
Bit
7
@Pup
1
Name
Description
SW PCI STOP
SW PCI_STP Function
0= PCI_STP assert, 1= PCI_STP deassert
When this bit is set to 0, all STOPPABLE PCI, PCIF and SRC outputs will
be stopped in a synchronous manner with no short pulses.
When this bit is set to 1, all STOPPED PCI,PCIF and SRC outputs will
resume in a synchronous manner with no short pulses.
PCI6 Output Enable
0 = Disabled, 1 = Enabled
6
1
PCI6
Byte 0:Control Register 0
(continued)
Bit
@Pup
Name
Description
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| CY28409OCT | Clock Synthesizer with Differential SRC and CPU Outputs |
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| CY28409OCT | 功能描述:時(shí)鐘合成器/抖動清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CY28409OCXT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409OXC | 功能描述:時(shí)鐘合成器/抖動清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CY28409OXCT | 功能描述:時(shí)鐘合成器/抖動清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CY28409ZC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
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