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參數(shù)資料
| 型號： | CY28409 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Clock Synthesizer with Differential SRC and CPU Outputs |
| 中文描述： | 時(shí)鐘合成器與微分SRC以及CPU的輸出 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大?。?/td> | 330K |
| 代理商： | CY28409 |
CY28409
Document #: 38-07445 Rev. *B
Page 4 of 18
Control Registers
20:27
28
29:36
37
38:45
46
....
....
....
....
....
....
Byte Count – 8 bits
Acknowledge from slave
Data byte 1 – 8 bits
Acknowledge from slave
Data byte 2 – 8 bits
Acknowledge from slave
......................
Data Byte (N–1) –8 bits
Acknowledge from slave
Data Byte N –8 bits
Acknowledge from slave
Stop
20
Repeat start
Slave address – 7 bits
Read = 1
Acknowledge from slave
Byte count from slave – 8 bits
Acknowledge from master
Data byte from slave – 8 bits
Acknowledge from master
Data byte from slave – 8 bits
Acknowledge from master
Data byte N from slave – 8 bits
Acknowledge from master
Stop
21:27
28
29
30:37
38
39:46
47
48:55
56
....
....
....
Table 4. Block Read and Block Write Protocol(continued)
Block Write Protocol
Description
Block Read Protocol
Description
Bit
Bit
Table 5. Byte Read and Byte Write protocol
Byte Write Protocol
Byte Read Protocol
Bit
Description
Bit
Description
1
Start
1
Start
2:8
Slave address – 7 bits
2:8
Slave address – 7 bits
9
Write = 0
9
Write = 0
10
Acknowledge from slave
10
Acknowledge from slave
11:18
Command Code – 8 bits
'100xxxxx' stands for byte operation, bits[4:0] of the
command code represents the offset of the byte to
be accessed
11:18
Command Code – 8 bits
'100xxxxx' stands for byte operation, bits[4:0] of
the command code represents the offset of the
byte to be accessed
19
Acknowledge from slave
19
Acknowledge from slave
20:27
Data byte from master – 8 bits
20
Repeat start
28
Acknowledge from slave
21:27
Slave address – 7 bits
29
Stop
28
Read = 1
29
Acknowledge from slave
30:37
Data byte from slave – 8 bits
38
Acknowledge from master
39
Stop
Byte 0:Control Register 0
Bit
7
6
@Pup
0
1
Name
Description
Reserved
PCIF
PCI
Reserved, Set = 0
PCI Drive Strength Override
0 = Force All PCI and PCIF Outputs to Low Drive Strength
1 = Force All PCI and PCIF Outputs to High Drive Strength
Reserved, Set = 0
Reserved, Set = 0
5
4
0
0
Reserved
Reserved
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY28409_06 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409AZXC | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY28409AZXCT | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY28409OC | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CY28409OCT | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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