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參數(shù)資料
| 型號(hào)： | CY28408ZCT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVS01; Number of Contacts:3; Connector Shell Size:9; Connecting Termination:Crimp; Circular Shell Style:Straight Receptacle; Body Style:Straight |
| 中文描述： | 166 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6 X 14 MM, TSSOP2-56 |
| 文件頁數(shù)： | 8/19頁 |
| 文件大小： | 212K |
| 代理商： | CY28408ZCT |
CY28408
Document #: 38-07617 Rev. **
Page 8 of 19
Special Functions
PCI_F and IOAPIC Clock Outputs
The PCIF clock outputs are intended to be used, if required,
for systems IOAPIC clock functionality. ANY two of the PCI_F
clock outputs can be used as IOAPIC 33-MHz clock outputs.
They are 3.3V outputs will be divided down via a simple
resistive voltage divider to meet specific system IOAPIC clock
voltage requirements. In the event these clocks are not
required, then these clocks can be used as general PCI clocks
or disabled via the assertion of the PCI_STP# pin.
3V66_1/VCH Clock Output
The 3V66_1/VCH pin has a dual functionality that is selectable
via SMBus. If Byte0, Bit 5 = ‘1’, then the output is configured
as a 48-MHz non-spread spectrum output. This output is
phase aligned with the other 48M outputs (USB and DOT), to
within 1 ns pin-to-pin skew. The switching of 3V66_1/VCH into
VCH mode occurs at system power on. When the SMBus Bit
5 of Byte 0 is programmed from a ‘0’ to a ‘1’, the 3V66_1/VCH
output may glitch while transitioning to 48M output mode.
CPU_STP# Clarification
The CPU_STP# signal is an active LOW input used for
synchronous stopping and starting the CPU output clocks
while the rest of the clock generator continues to function.
CPU_STP# – Assertion
When CPU_STP# pin is asserted, all CPUT/C outputs that are
set with the SMBus configuration to be stoppable via assertion
of CPU_STP# will be stopped after being sampled by two
falling CPUT/C clock edges. The final state of the stopped
CPU signals is CPUT = HIGH and CPU0C = LOW. There is no
change to the output drive current values during the stopped
state. The CPUT is driven HIGH with a current value equal to
(Mult 0 ‘select’) x (Iref), and the CPUC signal will not be driven.
Due to external pull-down circuitry CPUC will be LOW during
this stopped state.
Note:
3. 0 = 10K Pull-down resistor, 1 = 10k Pull-up resistor.
Table 7. Group Timing Relationship and Tolerances
Description
Offset
2.5 ns
0 or 10.4 ns
Tolerance
±
1.0 ns
±
1.0 ns
Conditions
3V66 to PCI
48M_USB to 48M_DOT Skew
3V66 Leads PCI
48MUSB
48MDOT
Figure 1. 48M_USB and 48M_DOT Phase Relationship
PCI
PCI_F
Tpci
3V66
Figure 2. 3V66 to PCI and PCI_F Phase Relationship
Table 8. Early PCI Select Functions
[3]
EPCI3
0
1
1
EPCI1
0
0
1
EPCI(3,1)
0.0 ns
0.8 ns
1.6 ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY28409 | Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409ZCT | Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409OC | RF/Coaxial Connector; RF Coax Type:BNC; Contact Termination:Clamp; Body Style:Straight Plug; RG Cable Type:59, 62, 71, 140, 210, 302 RoHS Compliant: Yes |
| CY28409OCT | Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409ZC | RF/Coaxial Connector; RF Coax Type:UHF; Contact Termination:Solder; Body Style:Straight Plug; RG Cable Type:8, 9, 87A, 213, 214, 225; Body Plating:Nickel RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY28409 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409_06 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409AZXC | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY28409AZXCT | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY28409OC | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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