參數(shù)資料
型號: CY28408ZC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: TV 19C 19#12 SKT RECP
中文描述: 166 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 6 X 14 MM, TSSOP2-56
文件頁數(shù): 12/19頁
文件大?。?/td> 212K
代理商: CY28408ZC
CY28408
Document #: 38-07617 Rev. **
Page 12 of 19
S0,S1
VTT_PWRGD#
PWRGD
VDD Clock Gen
Clock State
Clock Outputs
Clock VCO
0.2-0.3mS
Delay
State 0
State 2
State 3
Wait for
VTT_PWRGD#
Sample Sels
Off
Off
On
On
State 1
Device is not affected,
VTT_PWRGD# is
ignored.
Figure 9. VTT_PWRGD# Timing Diagram
VTT_PWRGD# = Low
Delay
>0.25mS
S1
Power Off
S0
VDDA = 2.0V
Sample
Inputs straps
S2
Normal
Operation
Wait for <1.8ms
Enable Outputs
S3
VTT_PWRGD# = toggle
VDDA = off
Figure 10. Clock Generator Power-up/Run State Diagram
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