參數(shù)資料
型號(hào): CY28378OC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類(lèi): XO, clock
英文描述: FTG for Pentium 4 and Intel 845 Series Chipset
中文描述: 200.4 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝: SSOP-48
文件頁(yè)數(shù): 7/22頁(yè)
文件大?。?/td> 174K
代理商: CY28378OC
CY28378
Document #: 38-07519 Rev. **
Page 7 of 22
Byte 2
Bit
@pup
0
1
1
1
1
1
1
1
Name
Pin Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 3
Reserved
PCI6
PCI5
PCI4
PCI3
PCI2
PCI1
PCI0
Reserved
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Bit
@Pup
1
1
1
0
1
0
1
1
Name
Pin Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 4
PCI_F2
PCI_F1
PCI_F0
Reserved
CPU_ITP, CPU_ITP#
Reserved
REF1
REF0
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Reserved
(Active/Inactive)
Reserved
(Active/Inactive)
(Active/Inactive)
Bit
@Pup
0
Name
Pin Description
Bit 7
MULTSEL_Override
This bit control the selection of IREF multiple.
0 = HW control; IREF multiplier is determined by MULTSEL[0:1] input pins
1 = SW control; IREF multiplier is determined by Byte[4], Bit[5:6].
IREF multiplier
00 = Ioh is 4 x IREF
01 = Ioh is 5 x IREF
10 = Ioh is 6 x IREF
11 = Ioh is 7 x IREF
Reserved
Reserved
Reserved
Reserved
Vendor Test Mode (always program to 0)
Bit 6
Bit 5
HW
HW
SW_MULTSEL1
SW_MULTSEL0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 5
0
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Bit
@Pup
HW
HW
HW
HW
HW
0
Name
Pin Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Latched FS4 input
Latched FS3 input
Latched FS2 input
Latched FS1 input
Latched FS0 input
FS_Override
Latched FS[4:0] inputs. These bits are read only.
0 = Select operating frequency by FS[4:0] input pins
1 = Select operating frequency by SEL[4:0] settings
0 = 48-MHz output on pin 27, 1 = 66-MHz output on pin 27
0 = 24-MHz,1 = 48-MHz
Bit 1
Bit 0
0
1
SEL 3V66
SEL 48MHZ
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