參數(shù)資料
型號(hào)： CY28378
廠(chǎng)商： Cypress Semiconductor Corp.
英文描述： FTG for Pentium 4 and Intel 845 Series Chipset
中文描述： 為奔騰4和Intel 845系列芯片組FTG
文件頁(yè)數(shù)： 10/22頁(yè)
文件大小： 174K
代理商： CY28378
CY28378
Document #: 38-07519 Rev. **
Page 10 of 22
Watchdog Self Recovery Sequence
This feature is designed to allow the system designer to
change frequency while the system is running and reboot the
operation of the system in case of a hang up due to the
frequency change.
When the system sends an SMBus command requesting a
frequency change through the Dial-a-Frequency Control
Registers, it must have previously sent a command to the
Watchdog Timer to select which time out stamp the Watchdog
must perform, otherwise the System Self Recovery feature will
not be applicable. Consequently, this device will change
frequency and then the Watchdog timer starts timing.
Meanwhile, the system BIOS is running its operation with the
new frequency. If this device receives a new SMBus command
to clear the bits originally programmed in the Watchdog Timer
bits (reprogram to 0000) before the Watchdog times out, then
this device will keep operating in its normal condition with the
new selected frequency.
The Watchdog timer will also be triggered if you program the
software frequency select bits (FSEL) to a new frequency
selection. If the Watchdog times out before the new SMBus
reprograms the Watchdog Timer bits to (0000), then this
device will send a low system reset pulse, on SRESET# and
changes WD Time-out bit to “1.”
Byte 12
Bit
@Pup
0
0
0
0
0
0
0
0
Name
Pin Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 13
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Bit
@Pup
0
0
0
0
0
0
0
0
Name
Pin Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 14
Reserved
CPU_FSEL_N6
CPU_FSEL_N5
CPU_FSEL_N4
CPU_FSEL_N3
CPU_FSEL_N2
CPU_FSEL_N1
CPU_FSEL_N0
If Prog_Freq_EN is set, the values programmed in CPU_FSEL_N[6:0] and
CPU_FSEL_M[5:0] will be used to determine the CPU output frequency.
The setting of FS_Override bit determines the frequency ratio for CPU and
other output clocks. When it is cleared, the same frequency ratio stated in
the Latched FS[4:0] register will be used. When it is set, the frequency
ratio stated in the SEL[4:0] register will be used.
Bit
@Pup
0
Name
Pin Description
Bit 7
Pro_Freq_EN
Programmable output frequencies enabled
0 = disabled
1 = enabled
Reserved
If Prog_Freq_EN is set, the values programmed in CPU_FSEL_N[6:0] and
CPU_FSEL_M[5:0] will be used to determine the CPU output frequency.
The setting of FS_Override bit determines the frequency ratio for CPU and
other output clocks. When it is cleared, the same frequency ratio stated in
the Latched FS[4:0] register will be used. When it is set, the frequency
ratio stated in the SEL[4:0] register will be used.
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
Reserved
CPU_FSEL_M5
CPU_FSEL_M4
CPU_FSEL_M3
CPU_FSEL_M2
CPU_FSEL_M1
CPU_FSEL_M0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY28378OC 制造商:SPECTRALINEAR 制造商全稱(chēng):SPECTRALINEAR 功能描述:FTG for Pentium 4㈢ and Intel㈢ 845 Series Chipset
CY28378OCT 制造商:SPECTRALINEAR 制造商全稱(chēng):SPECTRALINEAR 功能描述:FTG for Pentium 4㈢ and Intel㈢ 845 Series Chipset
CY28378OXC 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Sys Clk Pentium 4 & Intel Brookdale 845 RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
CY28378OXCT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Sys Clk Pentium 4 & Intel Brookdale 845 RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
CY28381 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:High-Performance SiS645DX/648DX/650/651 Intel Pentium 4 Clock Synthesizer
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