參數(shù)資料
型號: CY28349B
廠商: Cypress Semiconductor Corp.
英文描述: FTG for Intel Pentium 4 CPU and Chipsets
中文描述: FTG的英特爾奔騰4處理器和芯片組
文件頁數(shù): 3/22頁
文件大?。?/td> 174K
代理商: CY28349B
CY28349B
Document #: 38-07454 Rev. *A
Page 3 of 22
3V66_3/48MHz_1
PWR_DWN#
27
42
O
I
48-MHz or 66-MHz Output:
3.3V output.
Power-down Control:
3.3V LVTTL compatible input that places the device in
power down mode when held low.
SMBus Clock Input:
Clock pin for serial interface.
SMBus Data Input:
Data pin for serial interface.
System Reset Output:
Open-drain system reset output.
SCLK
SDATA
RST#
26
25
20
I
I/O
O
(open-d
rain)
I
IREF
35
Current Reference for CPU Output:
A precision resistor is attached to this pin
which is connected to the internal current reference.
Powergood from Voltage Regulator Module (VRM):
3.3V LVTTL input.
VTT_PWRGD# is a level-sensitive strobe used to determine when FS0:4 and
MULTSEL0:1 inputs are valid and OK to be sampled (Active LOW). Once
VTT_PWRGD# is sampled LOW, the status of this input will be ignored.
3.3V Power Connection:
Power supply for CPU outputs buffers, 3V66 output
buffers, PCI output buffers, reference output buffers and 48-MHz output buffers.
Connect to 3.3V.
VTT_PWRGD#
19
I
VDD_REF,
VDD _PCI,
VDD_48MHz,
VDD_3V66,
VDD_CPU
GND_PCI,
GND_48MHz,
GND_3V66,
GND_CPU,
GND_REF,
VDD_CORE
2, 9, 18, 24,
32, 39, 46
P
5, 13, 21, 29,
36, 43, 47
G
Ground Connection:
Connect all ground pins to the common system ground
plane.
34
P
3.3V Analog Power Connection:
Power supply for core logic, PLL circuitry.
Connect to 3.3V.
Analog Ground Connection:
Ground for core logic, PLL circuitry.
GND_CORE
33
G
Pin Definitions
(continued)
Pin Name
Pin No.
Pin
Type
Pin Description
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參數(shù)描述
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