參數(shù)資料
型號: CY28347OCT
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems
中文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: SSOP-56
文件頁數(shù): 13/22頁
文件大?。?/td> 188K
代理商: CY28347OCT
CY28347
Document #: 38-07352 Rev. *C
Page 13 of 22
For Open Drain CPU Output Signals
(with K7 Processor SELP4_K7# = 0)
For Differential CPU Output Signals (with P4 Processor SELP4_K7#= 1)
The following diagram shows lumped test load configurations
for the differential Host Clock Outputs.
Figure 4
is for the 1.0V
amplitude signalling and
Figure 5
is for the 0.7V amplitude
signalling.
Measurement Point
Measurement Point
20 pF
20 pF
680 pF
680 pF
60.4 Ohm
47 Ohm
47 Ohm
52
Ohm
5"
52
Ohm
5"
CPUOD_T
CPUOD_C
VDDCPU(1.5V)
500 Ohm
VDDCPU(1.5V)
500 Ohm
60.4 Ohm
301 Ohm
500 Ohm
500 Ohm
3.3V
3.3V
52
Ohm
1
"
52
Ohm
1"
Figure 2. K7 Termination
6”
6
Figure 3. Chipset Termination
Measurement Point
2 pF
CPUT
MULTSEL
T
PCB
T
PCB
CPUC
221
63.4
63.4
475
33.2
33.2
Measurement Point
2 pF
IREF
Figure 4. P4 1.0V Configuration
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