參數(shù)資料
型號: CY2300
廠商: Cypress Semiconductor Corp.
英文描述: Phase-Aligned Clock Multiplier
中文描述: 相不結(jié)盟時鐘倍頻
文件頁數(shù): 4/7頁
文件大?。?/td> 125K
代理商: CY2300
CY2300
Document #: 38-07252 Rev. *B
Page 4 of 7
Switching Characteristics for CY2300SI Industrial Temperature Devices
Parameter
Name
Test Conditions
Min.
Typ.
Max.
Unit
1/t
1
Output Frequency
15-pF load
10
133.33
MHz
10-pF load
166.67
MHz
Duty Cycle
[3]
= t
2
÷
t
1
Rise Time
[3]
Fall Time
[3]
Measured at V
DD
/2
Measured between 0.8V and 2.0V
40
50
60
%
t
3
t
4
t
5
1.20
ns
Measured between 0.8V and 2.0V
1.20
ns
Output to Output Skew on ris-
ing edges
[3]
All outputs equally loaded
Measured at V
DD
/2
Measured at V
DD
/2 from REFIN to any
output
200
ps
t
6
Delay, REFIN Rising Edge to
Output Rising Edge
[3]
Device to Device Skew
[3]
±
200
ps
t
7
Measured at V
DD
/2 on the 1/2xREF pin of
devices (pin 1)
400
ps
t
J
Period Jitter
[3]
Measured at Fout=133.33 MHz, loaded
outputs, 15-pF load
±
175
ps
t
LOCK
PLL Lock Time
[3]
Stable power supply, valid clocks present-
ed on REFIN
1.0
ms
Switching Waveforms
Duty Cycle Timing
t
1
t
2
V
DD
/2
All Outputs Rise/Fall Time
OUTPUT
t
3
3.3V
0V
0.8V
2.0V
2.0V
0.8V
t
4
Output-Output Skew
V
DD
/2
t
5
OUTPUT
OUTPUT
V
DD
/2
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