參數(shù)資料
型號(hào): CY2283PVC-1
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類(lèi): XO, clock
英文描述: PentiumII, K6, 6x86 100-MHz Clock Synthesizer/Driver for Desktop PCs with ALI or VIA Chipsets, AGP and 3 DIMMs
中文描述: 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝: SSOP-48
文件頁(yè)數(shù): 6/12頁(yè)
文件大?。?/td> 219K
代理商: CY2283PVC-1
CY2283
PRELIMINARY
6
Switching Characteristics for CY2283-1
[9, 10]
Parameter
Output
Description
Test Conditions
Min.
Typ.
Max.
Unit
t
1
t
2
All
Output Duty Cycle
[11]
t
1
= t
1A
÷
t
1B
Between 0.4V and 2.0V, V
DDCPU
= 2.5V
Between 0.4V and 2.4V, V
DDCPU
= 3.3V
Between 0.4V and 2.4V
45
50
55
%
CPUCLK
CPU Clock Rising and
Falling Edge Rate
0.75
4.0
V/ns
t
2
AGP,
REF0
AGP, REF0 Clock Rising
and Falling Edge Rate
0.85
4.0
V/ns
t
2
PCI
PCI Rising and Falling
Edge Rate
Between 0.4V and 2.4V
0.85
4.0
V/ns
t
3
CPUCLK
CPU Clock Rise Time
Between 0.4V and 2.0V, V
DDCPU
= 2.5V
Between 0.4V and 2.4V, V
DDCPU
= 3.3V
Between 2.0V and 0.4V, V
DDCPU
= 2.5V
Between 2.4V and 0.4V, V
DDCPU
= 3.3V
Measured at 1.25V, V
DDCPU
= 2.5V
Measured at 1.5V, V
DDCPU
= 3.3V
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
0.4
0.5
2.13
2.67
ns
t
4
CPUCLK
CPU Clock Fall Time
0.4
0.5
2.13
2.67
ns
t
5
CPUCLK
CPU-CPU Clock Skew
100
500
ps
t
6
CPUCLK,
PCICLK
CPU-PCI Clock Skew
2.5
3.5
5.5
ns
t
8
PCICLK,
PCICLK
PCI-PCI Clock Skew
Measured at 1.5V
500
ps
t
9
PCICLK,
AGP
PCI-AGP Clock Skew
Measured at 1.5V
1,200
ps
t
10
CPUCLK
Cycle-Cycle Clock Jitter
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
500
ps
t
10
t
10
t
11
PCICLK
Cycle-Cycle Clock Jitter
Measured at 1.5V
750
ps
AGP
Cycle-Cycle Clock Jitter
Measured at 1.5V
800
ps
CPUCLK,
PCICLK,
AGP
Power-up Time
CPU, PCI, AGP clock stabilization from
power-up
3
ms
Notes:
9.
10. Guaranteed by Design and Characterization, not 100% tested in production.
11. Duty cycle is measured at 1.5V when V
DD
= 3.3V. When V
DDCPU
= 2.5V, CPUCLK duty cycle is measured at 1.25V.
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