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參數(shù)資料
| 型號： | CY2281 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 100-MHz PentiumII Clock Synthesizer/Driver with Spread Spectrum for Mobile or Desktop PCs(應(yīng)用于移動或桌上型PC機并帶有寬頻譜的100MHz奔騰II時鐘合成器/驅(qū)動器) |
| 中文描述： | 100兆赫PentiumII時鐘合成器/驅(qū)動器，帶有擴頻移動或桌面電腦（應(yīng)用于移動或桌上型電腦機并帶有寬頻譜的100MHz的奔騰二時鐘合成器/驅(qū)動器譜） |
| 文件頁數(shù)： | 7/9頁 |
| 文件大小： | 121K |
| 代理商： | CY2281 |
CY2281
PRELIMINARY
7
Application Information
Clock traces must be terminated with either series or parallel termination, as they are normally done.
Application Circuit
Summary
A parallel-resonant crystal should be used as the reference to the clock generator. The operating frequency and C
of
this crystal should be as specified in the data sheet. Optional trimming capacitors may be needed if a crystal with a different
C
LOAD
is used. Footprints must be laid out for flexibility.
Surface mount, low-ESR, ceramic capacitors should be used for filtering. Typically, these capacitors have a value of 0.1
μ
F.
In some cases, smaller value capacitors may be required.
The value of the series terminating resistor satisfies the following equation, where Rtrace is the loaded characteristic imped-
ance of the trace, Rout is the output impedance of the clock generator (specified in the data sheet), and Rseries is the series
terminating resistor.
Rseries > Rtrace
–
Rout
Footprints must be laid out for optional EMI-reducing capacitors, which should be placed as close to the terminating resistor
as is physically possible. Typical values of these capacitors range from 4.7 pF to 22 pF.
A Ferrite Bead
may
be used to isolate the Board VDD from the clock generator VDD island. Ensure that the Ferrite Bead
offers greater than 50
impedance at the clock frequency, under loaded DC conditions. Please refer to the application note
“
Layout and Termination Techniques for Cypress Clock Generators
”
for more details.
If a Ferrite Bead is used, a 10
μ
F
–
22
μ
F tantalum bypass capacitor should be placed close to the Ferrite Bead. This capacitor
prevents power supply droop during current surges.
Cd = DECOUPLING CAPACITORS
Ct = OPTIONAL EMI-REDUCING CAPACITORS
Cx = OPTIONAL LOAD MATCHING CAPACITOR
Rs = SERIES TERMINATING RESISTORS
SEL
REF
CPUCLK
PCICLK
PCICLK_F
Cd
Cd
Ct
Rs
Cx
0.1
μ
F
0.1
μ
F
PWR_DWN#
CPU_STOP#
PCI_STOP#
SEL100
VDD 2.5V
VDD 3.3V
CY2281 28-PIN SSOP
XTALIN
XTALOUT
SEL
SEL100
VDDPCI/VDDREF
AVDD/VDDUSB
VSS
VDDCPU
REF
CPUCLK
PCICLK
PCICLK_F
PWR_DWN#
CPU_STOP#
PCI_STOP#
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY2282-1 | 100-MHz PentiumII Clock Synthesizer/Driver with Spread Spectrum and USB for Desktop PCs(應(yīng)用于桌上型PC機并帶有擴展頻譜和USB的100MHz奔騰II時鐘合成器/驅(qū)動器) |
| CY2282-11S | 100-MHz PentiumII Clock Synthesizer/Driver with Spread Spectrum and USB for Desktop PCs(應(yīng)用于桌上型PC機并帶有擴展頻譜和USB的100MHz奔騰II時鐘合成器/驅(qū)動器) |
| CY2283 | PentiumII, K6, 6x86 100-MHz Clock Synthesizer/Driver for Desktop PCs with ALI or VIA Chipsets, AGP and 3 DIMMs(帶ALI或VIA芯片組，AGP和3DIMM應(yīng)用于桌上型PC機的奔II，K6, 6x86 100MHz時鐘合成器/驅(qū)動器) |
| CY2285 | 100-MHz PentiumII Clock Synthesizer/Driver with Spread Spectrum for Mobile PCs(應(yīng)用于移動PC機并帶有寬頻譜的100MHz奔騰II時鐘合成器/驅(qū)動器) |
| CY2292FIT | Three-PLL General-Purpose EPROM Programmable Clock Generator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2283 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PentiumII, K6, 6x86 100-MHz Clock Synthesizer/Driver for Desktop PCs with ALI or VIA Chipsets, AGP and 3 DIMMs |
| CY2283PVC-1 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PentiumII, K6, 6x86 100-MHz Clock Synthesizer/Driver for Desktop PCs with ALI or VIA Chipsets, AGP and 3 DIMMs |
| CY2283PVC-2 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PentiumII, K6, 6x86 100-MHz Clock Synthesizer/Driver for Desktop PCs with ALI or VIA Chipsets, AGP and 3 DIMMs |
| CY2285 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:100-MHz Pentium㈢II Clock Synthesizer/Driver with Spread Spectrum for Mobile PCs |
| CY2285PVC-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
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