參數(shù)資料
型號: CY2277APVC-3
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: LJT 37C 37#16 SKT RECP
中文描述: 66.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝: SSOP-48
文件頁數(shù): 15/19頁
文件大小: 206K
代理商: CY2277APVC-3
CY2277A
Document #: 38-07332 Rev. *A
Page 15 of 19
Notes:
15. PCICLK on and PCICLK off latency is 1 rising edge of the external PCICLK.
16. PCI_STOP may be applied asynchronously. It is synchronized internally.
Switching Waveforms
(continued)
PCI_STOP
CPUCLK
(Internal)
PCICLK
(Internal)
PCICLK
(Free-Running)
PCI_STOP
PCICLK
(External)
[15, 16]
PWR_DOWN
CPUCLK
(Internal)
PCICLK
(Internal)
PWR_DWN#
PCICLK
(External)
CPUCLK
(External)
VCO
Crystal
Shaded section on the VCO and Crystal waveforms indicates that the VCO and crystal oscillator are active, and there is a valid clock.
Timing Requirements for the SMBus
SDA
SCL
t
11
t
12
t
13
t
14
t
15
t
17
t
18
t
19
t
20
t
16
t
12
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