參數(shù)資料
型號: CY101E383
廠商: Cypress Semiconductor Corp.
英文描述: ECL/TTL/ECL Translator and High-Speed Bus Driver(ECL/TTL/ECL 轉(zhuǎn)換器和高速總線驅(qū)動器)
中文描述: ECL / TTL電/ ECL翻譯和高速總線驅(qū)動器(ECL / TTL電/ ECL轉(zhuǎn)換器和高速總線驅(qū)動器)
文件頁數(shù): 1/10頁
文件大小: 248K
代理商: CY101E383
ECL/TTL/ECL Translator
and High-Speed Bus Driver
CY101E383
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
July 1990 - Revised April 11, 1997
408-943-2600
Features
BiCMOS for optimum speed/power
High speed (max.)
—3.0 ns t
PD
TTL-to-ECL
—4 ns t
PD
ECL-to-TTL
Low skew <
±
1 ns
Can operate on single +5V supply
Full-duplex ECL/TTL data transmission
Internal 2 k
ECL pull-down resistors on each ECL
output
80-pin PQFP package
84-pin PLCC package
V
BB
ECL reference voltage output
Single- or dual-supply operation
Capable of greater than 2001V ESD
ECL cable/twisted pair driver
Functional Description
The CY101E383 is a new-generation TTL-to-ECL and
ECL-to-TTL logic level translator designed for high-perfor-
mance systems. The device contains ten independent
TTL-to-ECL and ten independent ECL-to-TTL translators for
high-speed full-duplex data transmission, mixed logic, and bus
applications. The CY101E383 is especially suited to drive ECL
backplanes between TTL boards. The CY101E383 is imple-
mented with differential ECL I/O to provide balanced low noise
operation over controlled impedance buses between TTL
and/or ECL subsystems. In addition, the device has internal
output 2 k
pull-down resistors tied to VEE to decrease the
number of external components. For system testing pur-
poses or for driving light loads, the 2 k
is used as the only
termination thereby eliminating up to 20 external resistors.
The part meets standard 100K logic levels with the internal
pull-down while driving 50
to
2V.
The device is designed with ample ground pins to reduce
bounce, and has separate ECL and TTL power/ground pins to
reduce noise coupling between logic families. The parts can
operate in single- or dual-supply configurations while main-
taining absolute and 100K level swings. The translators are
offered in a standard 100K ECL-compatible version with
5.2V
or
4.5V power supply. The TTL I/O is fully TTL compatible.
The CY101E383 is packaged in 84-pin surface-mountable
PLCCs and CLCCs. To save board space, an 80-pin PQFP
package with 25-mil-lead pitch is available.
相關PDF資料
PDF描述
CY2030 USB, Audio, and I/O Clock Generator for Intel 82440LX Chipset(應用于英特爾 82440LX 芯片組的USB,音頻和輸入/輸出時鐘產(chǎn)生器)
CY2077FS High-accuracy EPROM Programmable Single-PLL Clock Generator
CY2077ZC High-accuracy EPROM Programmable Single-PLL Clock Generator
CY2077ZI High-accuracy EPROM Programmable Single-PLL Clock Generator
CY2077FZI High-accuracy EPROM Programmable Single-PLL Clock Generator
相關代理商/技術參數(shù)
參數(shù)描述
CY101E383-3YMB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ECL-to-TTL Translator
CY101E484-4DC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM
CY101E484-4KC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM
CY101E484-4YC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM
CY101E484-5DC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM