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參數(shù)資料
| 型號(hào)： | CY2030 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | USB, Audio, and I/O Clock Generator for Intel 82440LX Chipset(應(yīng)用于英特爾 82440LX 芯片組的USB,音頻和輸入/輸出時(shí)鐘產(chǎn)生器) |
| 中文描述： | USB，音頻，以及I / O時(shí)鐘發(fā)生器（應(yīng)用于英特爾82440LX芯片組的USB接口，音頻和輸入芯片組為Intel 82440LX /輸出時(shí)鐘產(chǎn)生器） |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 87K |
| 代理商： | CY2030 |
USB, Audio, and I/O Clock Generator for Intel 82440LX Chipset
Features
CY2030
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
January 10, 1997 - Revised July 1, 1997
USB, Audio, and I/O clock generator for most mother-
boards using 5
th
or 6
th
generation processors. Can also
be used for peripheral systems.
Two copies of 48 MHz USB clocks
One copy of 24 MHz I/O clock
Audio support for 33.8688 MHz, 24.576 MHz, 16.9344
MHz and 12.288 MHz, pin-selectable
Three copies of Ref. clock @ 14.318 MHz
14.318 MHz reference input
Ability to three-state all outputs
Test mode support
Output duty cycle 45% min. to 55% max.
Available in 20-pin SSOP packages
3.3V operation
Internal pull-up resistors on S0, S1, and OE inputs
Functional Description
The CY2030 is a peripheral clock generator for most mother-
boards using fifth and sixth generation processors. The device
outputs two copies of a 48 MHz USB clock, as well as one copy
of a 24 MHz I/O clock, both of which meet Intel’s accuracy,
drive, and jitter requirements. Additionally, the part drives two
audio clock outputs at 2X and 1X frequencies respectively.
These audio clocks support all frequencies that are required
by CODECs and FM synthesizers. Finally, the part outputs
three reference clocks at 14.318 MHz, which can be used to
drive ISA slots, graphics accelerators, and other devices re-
quiring this frequency.
The CY2030 can be used with the CY2275-1 and CY2276-1
(which are CPU, AGP, PCI, and SDRAM clock generators) to
provide a complete clock solution for PC motherboards.
The CY2030 accepts a 14.318 MHz reference signal as its
input. The CY2030 has two PLLs, one of which generates the
audio clocks, and the other generates the Universal Serial Bus
(USB) and I/O clocks. The CY2030 runs off a 3.3V supply.
Pin Configuration
Logic Block Diagram
XTALOUT
XTALIN
REF0 (14.318 MHz)
14.318
MHz
OSC.
1
2
3
4
5
6
7
8
9
10
11
12
16
15
14
13
17
20
19
18
Top View
SSOP
OE
2XAUDIO
AUDIO
V
DD
SEL0
REF2
REF1
REF0
USBCLK1
V
DD
REF1 (14.318 MHz)
REF2 (14.318 MHz)
USBCLK0 (48 MHz)
IOCLK (24 MHz)
2XAUDIO
AUDIO
SYS
PLL
Audio
PLL
ROM
SEL0
SEL1
OE
USBCLK1 (48 MHz)
/2
SEL1
(96 MHz)
/2
/2
/2
2:1
2:1
V
DD
XTALIN
XTALOUT
V
SS
V
SS
USBCLK0
V
DD
IOCLK
V
SS
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