參數資料
型號： CXP973064
廠商： Sony Corporation
英文描述： CMOS 16-bit Single Chip Microcomputer
中文描述： 的CMOS 16位單片機
文件頁數： 28/44頁
文件大?。?/td> 485K
代理商： CXP973064
–
28
–
CXP972032/973032/973064
SCK0,
SCK1,
SCK2
SCK0,
SCK1,
SCK2
SO0,
SO1,
SO2
SCS0,
SCS1,
SCS2
SCS0,
SCS1,
SCS2
SCK0,
SCK1,
SCK2
SCK0,
SCK1,
SCK2
SI0,
SI1,
SI2
SI0,
SI1,
SI2
SO0,
SO1,
SO2
SCK0,
SCK1,
SCK2
Note)
The load condition for the SCK output mode and SO output delay time is 100pF.
(6) Serial transfer (CH0, CH1, CH2)
(Topr =
–
30 to +85
°
C, V
DD
= 2.7 to 3.6V, Vss = 0V reference)
Item
CS
↓ →
SCK
delay time
CS
↑ →
SCK
float delay time
CS
↓ →
SO
delay time
CS
↑ →
SO
float delay time
CS high level
width
SCK cycle time
SCK
high, low pulse
width
SI input data
setup time
(for SCK
↑
)
SI input data
hold time
(for SCK
↑
)
SCK
↓ →
SO
delay time
Minimum interval
time
t
DCSK
t
DSKF
t
DCSO
t
DCSOF
t
WHCS
t
KCY
t
KH
,
t
KL
t
SIK
t
KSI
t
KSO
t
INT
Symbol
Pins
Min.
2
t
sys + 150
2
t
sys + 160
100
110
2
t
sys + 200
2
t
sys + 210
16/f
EX
16/f
EX
t
sys + 100
t
sys + 110
8/f
EX
–
100
8/f
EX
–
110
100
110
200
210
2
t
sys + 100
2
t
sys + 110
100
110
3
t
sys + 100
3
t
sys + 110
8/f
EX
–
100
8/f
EX
–
110
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max.
Unit
Conditions
External start
transfer mode
(SCK = output
mode)
External start
transfer mode
Input mode
Output mode
Input mode
Output mode
SCK input mode
SCK output mode
SCK input mode
SCK output mode
SCK input mode
SCK output mode
SCK input mode
SCK output mode
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
V
DD
= 3.3 ± 0.3V
V
DD
= 3.0 ± 0.3V
t
sys + 100
t
sys + 110
1.5
t
sys + 200
1.5
t
sys + 210
1.5
t
sys + 200
1.5
t
sys + 210
1.5
t
sys + 200
1.5
t
sys + 210
1.5
t
sys + 200
1.5
t
sys + 210
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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