參數(shù)資料
型號: CXD3412
廠商: Sony Corporation
英文描述: Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
中文描述: 時(shí)序發(fā)生器和幀讀出CCD圖像傳感器信號處理器
文件頁數(shù): 28/46頁
文件大小: 383K
代理商: CXD3412
C
Chart-1
Vertical Direction Timing Chart
MODE
Frame mode
Applicable CCD image sensor
ICX412
The number of SUB pulses is determined by the serial interface data. This chart shows the case where SUB pulses are output in each horizontal period.
ID/EXP of this chart shows ID. ID is low for lines where CCD OUT contains the R component, and high for lines where CCD OUT contains the B component.
1560 stages are fixed for high-speed sweep block.
VD of this chart is NTSC equivalent pattern (885H + 810ck units). For PAL equivalent pattern, it is 884H + 1104ck units.
VD
SUB
CLPOB
CLPDM
V1A
C
High-speed sweep block
High-speed sweep block
C
V1B
V2
V3A
V3B
V4
CCD OUT
1
1
1
1
1
1
1
1
1
1 3
2 4 6 8
4
2
6 8 10
5 7 1 3 5 7 9 11
PBLK
Wide CLPOB
ID/EXP
WEN
A Field
B Field
HD
1
1
886
877
877
886
A
B
96
95
101
101
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