參數(shù)資料
型號: CXD3021R
廠商: Sony Corporation
英文描述: Silver Mica Capacitor; Capacitance:25000pF; Capacitance Tolerance:+/- 1%; Series:CD42; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:27mm; Leaded Process Compatible:Yes RoHS Compliant: Yes
中文描述: CD數(shù)字信號處理器,具有內(nèi)置數(shù)字伺服和DAC
文件頁數(shù): 137/161頁
文件大小: 1311K
代理商: CXD3021R
– 137 –
CXD3021R
$35 (preset: $35 58 2D)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
FT1
FT0
FS5
FS4
FS3
FS2
FS1
FS0
FTZ
FG6
FG5
FG4
FG3
FG2
FG1
FG0
FT1, FT0, FTZ: Focus search-up speed
Default value: 010 (0.673
×
V
DD
V/s)
FT1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
1.35
×
V
DD
0.673
×
V
DD
0.449
×
V
DD
0.336
×
V
DD
1.79
×
V
DD
1.08
×
V
DD
0.897
×
V
DD
0.769
×
V
DD
FT0
FTZ
Focus search speed [V/s]
FS5 to Fs0:
Focus search limit voltage
Default value: 011000 ((1 ± 24/64)
×
V
DD
/2, V
DD
: supply voltage)
AGF convergence gain setting value
Default value: 0101101
FG6 to FG0:
$36 (preset: $36 0E 2E)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
TDZC DTZC TJ5
TJ4
TJ3
TJ2
TJ1
TJ0
SFJP TG6
TG5
TG4
TG3
TG2
TG1
TG0
TDZC:
Selects the TZC signal for generating the TRKCNCL signal during brake circuit operation.
When TDZC = 0, the edge of the HPTZC or STZC signal, whichever has the faster phase, is used.
When TDZC = 1, the edge of the HPTZC, STZC signal or the tracking drive signal zero-cross,
whichever has the fastest phase, is used. (See § 5-12.)
DTZC delay (8.5/4.25μs, when MCK = 128Fs)
Default value: 0 (4.25μs)
Track jump voltage
Default value: 001110 ((1 ± 14/64)
×
V
DD
/2, V
DD
: supply voltage)
Surf jump mode on/off
The tracking drive output is generated by adding the tracking filter output and TJReg (TJ5 to TJ0),
by setting SFJP to 1.
Set SFJP to 1 or TAOZ ($34D) to 0 in order to boost the low frequency for the TRK Jump
operation by the $34C command TLB2ON.
AGT convergence gain setting value
Default value: 0101110
DTZC:
TJ5 to TJ0:
SFJP:
TG6 to TG0:
: preset, V
DD
: supply voltage
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