參數(shù)資料
型號(hào): CXD3021R
廠商: Sony Corporation
英文描述: Silver Mica Capacitor; Capacitance:25000pF; Capacitance Tolerance:+/- 1%; Series:CD42; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:27mm; Leaded Process Compatible:Yes RoHS Compliant: Yes
中文描述: CD數(shù)字信號(hào)處理器,具有內(nèi)置數(shù)字伺服和DAC
文件頁(yè)數(shù): 105/161頁(yè)
文件大?。?/td> 1311K
代理商: CXD3021R
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– 105 –
CXD3021R
Description of DAC Block Functions
Zero data detection
When the condition where the lower 4 bits of the input data are DC and the remaining upper bits are all "0" or
all "1" has continued for about 300ms (16384/44.1kHz), zero data is detected. Zero data detection is
performed independently for the left and right channels.
Mute flag output
The LMUTO and RMUTO pins go active when any one of the following conditions is met.
The polarity can be selected by the $9X command ZDPL.
When zero data is detected
When the $9X commands DAC SMUTL and DAC SMUTR are set (The flags change independently for the
left and right channels.)
The mute flag output at initializing is as shown below. (This is in the case the zero data is input from LRCKI,
BCKI, PCMDI and the time address $9X command ZDPL and address $AX command MCSL stay in the
initial values.)
A
Y1
B
Y3
C
Y2
23.2 [ms]
000(H)
0dB
400(H)
XRST
LMUTO
RMUTO
Approx. 370ms when crystal = 16.9344MHz
Approx. 185ms when crystal = 33.8688MHz
Attenuation operation
Assuming the attenuation commands X1, X2 and X3, the corresponding audio outputs are Y1, Y2 and Y3 (Y1
> Y3 > Y2). First, the command X1 is sent and then the audio output approaches Y1. When the command
X2 is sent before the audio output reaches Y1 (A in the figure), the audio output passes Y1 and approaches
Y2. And, when the command X3 is sent before the audio output rteaches Y2 (B or C in the figure), the audio
output approaches Y3 from the value (B or C in the figure) at that point.
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