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參數(shù)資料
| 型號： | CXD3017Q |
| 廠商： | Sony Corporation |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | CD Digital Signal Processor with Built-in Digital Servo and DAC(CD數(shù)字信號處理器（內(nèi)置數(shù)字伺服系統(tǒng)和 D/A轉(zhuǎn)換器）) |
| 中文描述： | CD數(shù)字信號處理器，具有內(nèi)置數(shù)字伺服和DAC（光盤數(shù)字信號處理器（內(nèi)置數(shù)字伺服系統(tǒng)和的D / A轉(zhuǎn)換器）） |
| 文件頁數(shù)： | 12/117頁 |
| 文件大?。?/td> | 778K |
| 代理商： | CXD3017Q |
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CXD3017Q
Contents
§1. CPU Interface
§
1-1.
§
1-2.
§
1-3.
§
1-4.
CPU Interface Timing ........................................................................................................................ 13
CPU Interface Command Table ........................................................................................................ 13
CPU Command Presets .................................................................................................................... 24
Description of SENS Signals and Commands ................................................................................... 30
§2. Subcode Interface
§
2-1.
80-bit Sub Q Readout ........................................................................................................................ 46
§3. Description of Other Functions
§
3-1.
Channel Clock Regeneration by the Digital PLL Circuit .................................................................... 49
§
3-2.
Frame Sync Protection ...................................................................................................................... 50
§
3-3.
Error Correction ................................................................................................................................. 50
§
3-4.
DA Interface ....................................................................................................................................... 51
§
3-5.
Digital Out .......................................................................................................................................... 53
§
3-6.
Servo Auto Sequence ....................................................................................................................... 53
§
3-7.
Digital CLV ......................................................................................................................................... 60
§
3-8.
CD-DSP Block Playback Speed ........................................................................................................ 61
§
3-9.
DAC Block Playback Speed .............................................................................................................. 61
§
3-10. Description of DAC Block Functions .................................................................................................. 62
§
3-11. LPF Block .......................................................................................................................................... 65
§
3-12. Asymmetry Compensation ................................................................................................................ 66
§
3-13. CD TEXT Data Demodulation ........................................................................................................... 67
§4. Description of Servo Signal Processing System Functions and Commands
§
4-1.
General Description of Servo Signal Processing System .................................................................. 69
§
4-2.
Digital Servo Block Master Clock (MCK) ........................................................................................... 70
§
4-3.
DC Offset Cancel [AVRG Measurement and Compensation] ........................................................... 71
§
4-4.
E:F Balance Adjustment Function ..................................................................................................... 72
§
4-5.
FCS Bias Adjustment Function .......................................................................................................... 72
§
4-6.
AGCNTL Function ............................................................................................................................. 74
§
4-7.
FCS Servo and FCS Search ............................................................................................................. 76
§
4-8.
TRK and SLD Servo Control ............................................................................................................. 77
§
4-9.
MIRR and DFCT Signal Generation .................................................................................................. 78
§
4-10. DFCT Countermeasure Circuit .......................................................................................................... 79
§
4-11. Anti-Shock Circuit .............................................................................................................................. 79
§
4-12. Brake Circuit ...................................................................................................................................... 80
§
4-13. COUT Signal ..................................................................................................................................... 81
§
4-14. Serial Readout Circuit ........................................................................................................................ 81
§
4-15. Writing to the Coefficient RAM .......................................................................................................... 82
§
4-16. PWM Output ...................................................................................................................................... 82
§
4-17. Servo Status Changes Produced by the LOCK Signal ..................................................................... 83
§
4-18. Description of Commands and Data Sets ......................................................................................... 83
§
4-19. List of Servo Filter Coefficients ........................................................................................................ 107
§
4-20. Filter Composition ............................................................................................................................ 109
§
4-21. TRACKING and FOCUS Frequency Response .............................................................................. 115
§5. Application Circuit
.................................................................................................................................. 116
Explanation of abbreviations
AVRG:
AGCNTL: Auto gain control
FCS:
Focus
TRK:
Tracking
SLD:
Sled
DFCT:
Defect
Average
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