參數(shù)資料
型號(hào)： CXD3011R-1
廠商： Sony Corporation
英文描述： Hook-Up Wire; Conductor Size AWG:26; No. Strands x Strand Size:7 x 34; Jacket Color:White/Yellow; Cable/Wire MIL SPEC:MIL-W-16878/1 Type B; Conductor Material:Copper; Jacket Material:Polyvinylchloride (PVC) RoHS Compliant: Yes
中文描述： CD數(shù)字信號(hào)處理器，具有內(nèi)置數(shù)字伺服和DAC
文件頁(yè)數(shù)： 124/160頁(yè)
文件大?。?/td> 1512K
代理商： CXD3011R-1
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– 124 –
CXD3011R-1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
KA6
KA5
KA4
KA3
KA2
KA1
KA0
KD7
KD6
KD5
KD4
KD3
KD2
KD1
KD0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
0
0
PGFS1 PGFS0 PFOK1 PFOK0
0
0
0
0
MRT2 MRT1
0
0
When D15 = 0.
KA6 to KA0: Coefficient address
KD7 to KD0: Coefficient data
§ 5-18. Description of Commands and Data Sets
$34
$348 (preset: $348 000)
PGFS1
0
0
1
1
0
1
0
1
High when the frame sync is of the correct timing,
low when not the correct timing.
High when the frame sync is of the correct timing,
low when continuously not the correct timing for 2ms or longer.
High when the frame sync is of the correct timing,
low when continuously not the correct timing for 4ms or longer.
High when the frame sync is the correct timing,
low when continuously not the correct timing for 8ms or longer.
PGFS0
Processing
These commands set the GFS pin hold time. The hold time is inversely proportional to the playback speed.
PFOK1
0
0
1
1
0
1
0
1
High when the RFDC value is higher than the FOK slice level,
low when lower than the FOK slice level.
High when the RFDC value is higher than the FOK slice level,
low when continuously lower than the FOK slice level for 4.35ms or more.
High when the RFDC value is higher than the FOK slice level,
low when continuously lower than the FOK slice level for 10.16ms or more.
High when the RFDC value is higher than the FOK slice level,
low when continuously lower than the FOK slice level for 21.77ms or more.
PFOK0
Processing
These commands set the FOK hold time. See $3B for the FOK slice level.
These are the values when MCK = 128Fs, and the hold time is inversely proportional to the MCK setting.
MRT2
0
0
1
1
0
1
0
1
No time limit
1.1ms
2.2ms
4.0ms
MRT1
Time limit
These commands limit the time while Mirr = high. These are the values when MCK = 128Fs, and the time limit
is inversely proportional to the MCK setting.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CXD3017Q 制造商:SONY 制造商全稱(chēng):Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC
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