參數(shù)資料
型號： CXD3005R
廠商： Sony Corporation
元件分類： 數(shù)字信號處理
英文描述： CD Digital Signal Processor with Built-in Digital Servo and DAC
中文描述： CD數(shù)字信號處理器，具有內(nèi)置數(shù)字伺服和DAC
文件頁數(shù)： 8/136頁
文件大小： 1682K
代理商： CXD3005R
– 8 –
CXD3005R
In the CXD3005R, the following pins are NC.
Pins 1, 2, 19, 35, 36, 37, 38, 54, 71, 72, 73, 74, 90, 107, 108, 109, 110, 127, 143 and 144
Notes)
The 64-bit slot is an LSB first, two's complement output. The 48-bit slot is an MSB first, two's
complement output.
GTOP is used to monitor the frame sync protection status. (High: sync protection window released.)
XUGF is the frame sync obtained from the EFM signal, and is negative pulse. It is the signal before
sync protection.
XPLCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the
EFM signal transition point coincide.
The GFS signal goes high when the frame sync and the insertion protection timing match.
RFCK is derived from the crystal accuracy, and has a cycle of 136μs.
C2PO represents the data error status.
XRAOF is generated when the 32K RAM exceeds the ±28F jitter margin.
123
124
125
126
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
O
O
O
O
I
I
I
I
O
I
O
I
O
I
I
I
1, 0
1, 0
1, 0
1, 0
1, Z, 0
1, Z, 0
Tracking drive output.
Focus drive output.
Focus drive output.
Digital power supply.
Analog EFM PLL oscillation circuit output.
Analog EFM PLL oscillation circuit input. flock = 8.6436MHz
Test pin. Normally fixed to low.
Test pin. Normally fixed to low.
Test pin. Normally fixed to low.
Analog EFM PLL charge pump output.
Variable pitch clock input from the external VCO. fcenter = 16.9344MHz
Set VCKI to low when the external clock is not input to this pin.
Wide-band EFM PLL VCO2 oscillation output.
Analog power supply.
Connects the operational amplifier current source reference resistance connection.
Analog GND.
Operational amplifier output.
RF signal input.
Center servo analog input.
Tracking error signal input.
TRDR
FFDR
FRDR
DV
DD
5
VCOO
VCOI
TEST
TES2
TES3
PDO
VCKI
V16M
AV
DD
2
IGEN
AV
SS
2
ADIO
RFDC
CE
TE
Pin
No.
Symbol
I/O
Description
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CXD3008Q 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo
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