參數(shù)資料
型號: CXD2598Q
廠商: Sony Corporation
元件分類: 數(shù)字信號處理
英文描述: CD Digital Signal Processor with Built-in Digital Servo and DAC(數(shù)字式CD信號處理器(內(nèi)置數(shù)字式伺服系統(tǒng)和D/A轉(zhuǎn)換器))
中文描述: CD數(shù)字信號處理器,具有內(nèi)置數(shù)字伺服和DAC(數(shù)字式光盤信號處理器(內(nèi)置數(shù)字式伺服系統(tǒng)和的D / A轉(zhuǎn)換器))
文件頁數(shù): 53/147頁
文件大?。?/td> 1113K
代理商: CXD2598Q
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CXD2598Q
Command bit
Processing
VPCTL1 to 0, VP7 to 0
Sets the pitch for the variable pitch mode.
The settings in variable pitch mode are as follows.
The pitch setting can be expressed with the following equation.
P = 10
–n
P: Pitch setting value
n: VPCTL1 and VPCTL0, VP7 to VP0 setting value
(two's complement, VPCTL1 = sign bit)
The pitch setting range is from –48.7 to +51.2%.
The plus pitch setting should not exceed the playback speed given in the Recommended Operating Conditions.
An example of variable pitch mode commands is shown below.
$A4XXXXX
(Setting to enable variable pitch mode.)
$ACXXXXX
(Turns on variable pitch mode. The internal clock uses the VCO2 reference.)
$D60A00
(Sets the pitch to +1.0%.)
$D60000
(Sets the pitch to 0.0%.)
$A4XXXXX
(Turns off variable pitch mode. The internal clock uses the crystal reference.)
VPCTL1
1
1
0
0
VPCTL0
0
1
0
1
VP7 to 0
00(H)
:
FF(H)
00(H)
:
FF(H)
00(H)
:
FF(H)
00(H)
:
E7(H)
Pitch setting value [%]
+51.2
to
+25.7
+25.6
to
+0.1
0.0
to
–25.5
–25.6
to
–48.7
Command setting
example
$D60080
:
$D6FF80
$D600C0
:
$D6FFC0
$D60000
:
$D6FF00
$D60040
:
$D6E740
Command bit
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CXD2719Q 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Single-Chip Dolby Pro Logic Surround Decoder
CXD2720Q 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Single-Chip Digital Signal Processor for Karaoke
CXD2720Q-2 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Single-Chip Dolby Pro Logic Surround Decoder
CXD2721Q-1 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Single-Chip Digital Signal Processor for Karaoke
CXD2724AQ-1 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Single-Chip Dolby Pro Logic Surround Decoder