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CXD1196AR
2.2 Read register
In the descriptions of the registers STS, HDRFLG, HDR, SHDR and CMADR, what is referred to as the
current sector refers to the sector where registers are valid for a decoder interrupt (DECINT). In the monitor
only and write only modes, the sector from the DSP for CD just before a decoder interrupt is called the
current sector. In the real time correction mode and repeat correction mode, the sector that has gone
through error detection and correction is referred to as the current sector.
2.2.1
Register Address (REGADR) Register
2.2.2
DMADATA Register
When data transfer (buffer read) is to be made in the I/O mode, the CPU reads data from this register.
2.2.3
Interrupt Status (INTSTS) Register
The values of the individual bits of this register indicate the respective associated values of interrupt status.
These bits are not affected by the values of the individual bits of the INTMSK register.
Bit7
ADPEND (ADPCM End)
Bit6
DECTOUT (DECODER Time Out)
Bit5
DMACMP (DMA Complete)
Bit4
DECINT (DECODER Interrupt)
Bit3
CIERR (Coding Information Error)
2.2.4
Status (STS) Register
DRQ (Data Request)
This bit indicates the value of the DRQ pin.
ADPBSY (ADPCM BUSY)
This bit goes ‘H’ during ADPCM playback.
ERINBLK (Erasure in Block)
On all the bytes of the current sector except the SYNC byte, this bit goes ‘H’ if there is one or more
bytes from the DSP for CD whose C2 pointer is ON.
CORINH (Correction Inhibit)
When the DECCTL register is set AUTODIST bit = ‘H’, this bit goes ‘H’ if the error flag is ON in the
MODE (and FORM) byte.
EDCOK
Indicates EDC check showed there were no errors in the current sector.
ECCOK
Indicates there are no more errors from the Header to P parity bytes in the current sector. (In the
MODE2, FORM2 sector, this bit is treated as a DON’T CARE bit.)
SHRTSCT (Short Sector)
Indicates the Sync Mark interval was less than 2351 bytes. On this sector, neither ECC nor EDC is
executed.
NOSYNC
Indicates that the SYNC Mark, not detected in the predetermined position, is one internally inserted.
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
2.2.5
Header Flag (HDRFLG) Register
Indicates the value of the error pointer of the Header and Sub Header registers.