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參數(shù)資料
| 型號： | CX72302 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CX72302: Spur-Free, 6.1 GHz Dual Fractional-N Frequency Synthesizer |
| 中文描述： | CX72302：支線，免費，6.1 GHz雙分數(shù)N頻率合成器 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 162K |
| 代理商： | CX72302 |
DATA SHEET CX72302
Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 sales@skyworksinc.com www.skyworksinc.com
101216G Skyworks Proprietary and Confidential information Products and Product Information are Subject to Change Without Notice July 22, 2004
13
Main Synthesizer Mode = 1-bit value that powers down the
main synthesizer’s
Σ
modulator and fractional unit to operate
as an integer-N synthesizer. When this bit is 0, the main
synthesizer is in fractional-N mode. When this bit is 1, the main
synthesizer is in integer-N mode.
Main Synthesizer
Σ
Fractionality = 1-bit value that configures
the size of the main
Σ
modulator. This has a direct effect on
power consumption and on the level of fractionality and step
size. When this bit is 0, the main
Σ
modulator is 18-bit with a
fractionality of 2
18
and a step size of
F
ref_main
/262144. When this
bit is 1, the main
Σ
modulator is 10-bit with a fractionality of
2
10
and a step size of
F
ref_main
/1024.
Auxiliary Synthesizer Power Down = 1-bit value that powers
down the auxiliary synthesizer. When this bit is 0, the auxiliary
synthesizer is powered up. When this bit is 1, the auxiliary
synthesizer is in power-down mode.
Auxiliary Synthesizer Mode = 1-bit value that powers down the
auxiliary synthesizer’s
Σ
modulator and fractional unit to
operate as an integer-N synthesizer. When this bit is 0, the
auxiliary synthesizer is in fractional-N mode. When this bit is 1,
the auxiliary synthesizer is in integer-N mode.
NOTE
: There are no special power-up sequences required for
the CX72302.
Multiplexer Output Selection = 3-bit value that selects which
internal signal is output to the Mux_out pin. The following
internal signals are available on this pin:
Reference Oscillator,
F
ref
Main or auxiliary divided reference (post reference
frequency main or auxiliary dividers),
F
ref_main
or
F
ref_aux
Main or auxiliary phase detector frequency (post main and
auxiliary frequency dividers),
F
pd_main
or
F
pd_aux
Serial data out, for loop-back and test purposes
Refer to Table 4 for more information.
Mux_out Pin Three-State Enable = 1-bit value to three-state the
Mux_out pin. When this bit is 0, the Mux_out pin is enabled.
When this bit is 1, the Mux_out pin is three-stated.
The Modulation Control Register is used to configure the
modulation unit of the main synthesizer The modulation unit adds
or subtracts a frequency offset to the selected center frequency at
which the main synthesizer operates. The size of the modulation
data sample, controlled by the duration of the CS signal, can be
from 2 to 12 bits wide, to provide from 4 to 4096 selectable
frequency offset steps.
The modulation data magnitude offset selects the magnitude
multiplier for the modulation data and can be from 0 to 8. As
shown in Figure14, the values to be loaded are:
Modulation Data Magnitude Offset = 4-bit value that indicates
the magnitude multiplier (
m
) for the modulation data samples.
Valid values range from 0 to 13, effectively providing a 2
m
multiplication of the modulation data sample.
Modulation Data Input Select = 1-bit value that indicates the pin
on which modulation data samples are serially input when the
CS signal is between 2 and 12 bits long. When this bit is 0,
modulation data samples are to be presented on the Data pin.
When this bit is 1, modulation data samples are to be presented
on the Mod_in pin.
Modulation Address Disable = 1-bit value that indicates the
presence of the address as modulation data samples are
presented on either the Mod_in or Data pins. When this bit is 0,
the address is presented with the modulation data samples (i.e.,
all transfers are 16 bits long). When this bit is 1, no address is
presented with the modulation data samples (i.e., all transfers
are 2 to 12 bits long).
Table 4. Multiplexer Output
Multiplexer Output Select
(Bit 8)
Multiplexer Output Select
(Bit 7)
Multiplexer Output Select
(Bit 6)
Multiplexer Output
(Mux_out)
0
0
0
Reference Oscillator
0
0
1
Auxiliary Reference Frequency (
F
ref_aux
)
0
1
0
Main Reference Frequency (
F
ref_main
)
0
1
1
Auxiliary Phase Detector Frequency (
F
pd_aux
)
1
0
0
Main Phase Detector Frequency (
F
pd_main
)
1
0
1
Serial data out
1
1
0
Serial Interface Register test output
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