參數(shù)資料
型號: CS3842AGDR14
元件分類: 穩(wěn)壓器
英文描述: 1 A SWITCHING CONTROLLER, PDSO14
封裝: SO-14
文件頁數(shù): 4/6頁
文件大?。?/td> 156K
代理商: CS3842AGDR14
4
CS2842A/3843A
SERIES
VREF
VCC
VOUT
1k
1W
0.1F
VREF
VCC
VOUT
Gnd
VFB
Sense
OSC
COMP
5k
100k
4.7k
1k
ERROR AMP
ADJUST
4.7k
Sense
ADJUST
RT
2N2222
CT
Gnd
A
Test Circuit
Undervoltage Lockout
During Undervoltage Lockout (Figure 1), the output driv-
er is biased to a high impedance state. The output should
be shunted to ground with a resistor to prevent output
leakage current from activating the power switch.
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
which represents the peak output inductor current (Figure
2). An increase in VCC causes the inductor current slope to
increase, thus reducing the duty cycle. This is an inherent
feed-forward characteristic of current mode control, since
the control voltage does not have to change during
changes of input supply voltage.
When the power supply sees a sudden large output cur-
rent increase, the control voltage will increase allowing the
duty cycle to momentarily increase. Since the duty cycle
tends to exceed the maximum allowed to prevent trans-
VCC
ON/OFF Command
to reset of IC
VON
16V
8.4V
VOFF
10V
7.6V
CSX842A CSX843A
<15mA
<1mA
VON VOFF
ICC
VCC
Circuit Description
Typical Performance Characteristics
.0005
.001
.002
.003
.005
.01
.02
.03
.04
800
900
FREQ.
(kHz)
CT (F)
700
600
500
400
300
200
100
.05
RT =1.5k
RT =680
RT =10k
100
200
700
1k
2k
5k
7k
10k
80
90
DUTY
CYCLE
(%)
RT ()
70
60
50
40
30
20
10
4k
3k
500
400
300
100
Oscillator Duty Cycle vs RT
Oscillator Frequency vs CT
Figure 1: Typical Undervoltage Characteristics
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