參數(shù)資料
型號(hào): COP8CBR9HLQ8
廠商: National Semiconductor
文件頁(yè)數(shù): 42/111頁(yè)
文件大?。?/td> 0K
描述: IC MCU CMOS 8BIT 44LLP
標(biāo)準(zhǔn)包裝: 1
系列: COP8™ 8C
核心處理器: COP8
芯體尺寸: 8-位
速度: 20MHz
連通性: Microwire/Plus(SPI),UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 37
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-WFQFN 裸露焊盤(pán)
包裝: 剪切帶 (CT)
其它名稱: *COP8CBR9HLQ8
COP8CBR9HLQ8CT
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
Table 5-5. ISP Read Data Register
ISPRD
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
5.10.3.3 ISP Write Data RegisterThis table assumes that the control flag MSEL is set.
The Write Data Register (ISPWR) contains the data to be written into the specified address. This register
is undetermined on Reset. This register can be accessed from either flash program memory or Boot ROM.
The Write Data register must be maintained for the entire duration of the operation.
Table 5-6. ISP Write Data Register
ISPWR
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
5.10.3.4 ISP Write Timing Register
The Write Timing Register (PGMTIM) is used to control the width of the timing pulses for write and erase
operations. The value to be written into this register is dependent on the frequency of CKI and is shown in
Table 5-7. This register must be written before any write or erase operation can take place. It only needs
to be loaded once, for each value of CKI frequency. This register can be loaded from either flash program
memory or Boot ROM and must be maintained for the entire duration of the operation. The
MICROWIRE/PLUS ISP routine that is resident in the boot ROM requires that this Register be defined
prior to any access to the Flash memory. Refer to Microwire for more information on available ISP
commands. On Reset, the PGMTIM register is loaded with the value that corresponds to 10 MHz
frequency for CKI.
Table 5-7. PGMTIM Register Format
PGMTIM
Register Bit
CKI Frequency Range
7
6
5
4
3
2
1
0
0
1
25 kHz–33.3 kHz
0
1
0
37.5 kHz–50 kHz
0
1
50 kHz–66.67 kHz
0
1
0
62.5 kHz–83.3 kHz
0
1
0
1
75 kHz–100 kHz
0
1
100 kHz–133 kHz
0
1
0
112.5 kHz–150 kHz
0
1
0
1
150 kHz–200 kHz
0
1
200 kHz–266.67 kHz
0
1
0
1
225 kHz–300 kHz
0
1
0
1
300 kHz–400 kHz
0
1
0
1
375 kHz–500 kHz
0
1
0
1
500 kHz–666.67 kHz
0
1
0
1
600 kHz–800 kHz
0
1
800 kHz–1.067 MHz
0
1
0
1
1 MHz–1.33 MHz
0
1
0
1
0
1.125 MHz–1.5 MHz
0
1
0
1
0
1
1.5 MHz–2 MHz
36
Functional Description
Copyright 2000–2013, Texas Instruments Incorporated
Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9
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