參數(shù)資料
型號(hào): CK49X-495314
廠商: Cirrus Logic Inc
文件頁(yè)數(shù): 15/19頁(yè)
文件大?。?/td> 0K
描述: EVALKIT 32BIT 600M 128PIN QFPDSP
其它有關(guān)文件: On-Chip IRC Prod Bullitin
應(yīng)用說(shuō)明: Audio DSP Eval Kit Appl Note
設(shè)計(jì)資源: CS4953x4/4970X4 Designer Guide
標(biāo)準(zhǔn)包裝: 1
類型: DSP
適用于相關(guān)產(chǎn)品: CS495314
所含物品: 2 個(gè)板,線纜,電源
其它名稱: 598-1938
CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
DS705F2
5
2.1 Migrating from CS4953x3 to CS4953x4
The recommended way to boot the DSP for normal operation is “master boot”. Refer to Chapter 1 of the
CS4953x4/CS4970x4 System Designer’s Guide. CS4953x4 supports slave boot mode as well (used for
programming the serial flash with the DSP code, through the SCP2 port).
CS4953x4 DSPs are only available in 128 pin package.
The serial flash chip select pin used is pin 14 (GPIO0) for master boot. Cirrus Logic recommends that at
least an 8-Mb serial flash device be used. Refer to CS4953x4/CS4970x4 System Designer’s Guide for a
list of flash types that are currently supported.
CS4953x4 DSP family supports DSP Condenser and DSP Manager API for runtime control/host
communication. Refer to CS4953x4/CS4970x4 System Designer’s Guide for details.
2.2 Licensing
Licenses are required for all third party audio decoding/processing algorithms, including the application notes.
contact your local Cirrus Sales representative for more information.
3 Code Overlays
The suite of software available for the CS4953xx family consists of an operating system (OS) and a library of
overlays. The overlays have been divided into three main groups called Decoders, Matrix-processors, and
Post-processors. All software components are defined below:
OS/Kernel - Encompasses all non-audio processing tasks, including loading data from external memory,
processing host messages, calling audio-processing subroutines, error concealment, etc.
Decoders - Any Module that initially writes data into the audio I/O buffers, e.g. AC-3, DTS, PCM, etc. All
the decoding/processing algorithms listed below require delivery of PCM or IEC61937-packed,
compressed data via I2S- or LJ-formatted digital audio to the CS4953xx.
Matrix-processors - Any module that processes audio I/O buffer PCM data in-place before the Post-
processors. Generally speaking, these modules alter the number of valid channels in the audio I/O buffer
through processes like Virtualization (n
2 channels) or Matrix Decoding (2n channels). Examples are
Dolby ProLogic II, IIx, IIz and DTS Neo:6.
Post-processors - Any module that processes audio I/O buffer PCM data in-place after the Matrix-
Processors. Examples are Bass Management, Audio Manager, Tone Control, EQ, Delay, Customer-
specific Effects, Dolby Headphone 2 and Dolby Virtual Speaker 2, etc.
The overlay structure reduces the time required to reconfigure the DSP when a processing change is
requested. Each overlay can be reloaded independently without disturbing the other overlays. For example,
when a new decoder is selected, the OS, matrix-, and post-processors do not need to be reloaded — only the
new decoder (the same is true for the other overlays).
Table 2 below lists the firmware available based on device selection. Refer to AN288, CS4953xx/CS497xxx
Firmware User’s Manual for the latest listing of application codes and Cirrus Framework modules available.
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