- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄17060 > CDB4382A (Cirrus Logic Inc)BOARD EVAL FOR CS4382A DAC PDF資料下載
參數(shù)資料
| 型號： | CDB4382A |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 21/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR CS4382A DAC |
| 標準包裝： | 1 |
| DAC 的數(shù)量： | 8 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 192k |
| 數(shù)據(jù)接口： | 串行 |
| DAC 型： | 電壓 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | CS4382A |
| 產品目錄頁面： | 757 (CN2011-ZH PDF) |
| 相關產品： | CS4382A-DQZR-ND - IC DAC 8CH 114DB 192KHZ 48-LQFP CS4382A-DQZ-ND - IC DAC 8CH 114DB 192KHZ 48-LQFP CS4382A-CQZR-ND - IC DAC 8CH 114DB 192KHZ 48-LQFP 598-1061-ND - IC DAC 8CH 114DB 192KHZ 48LQFP |
| 其它名稱： | 598-1524 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁
28
DS618F2
CS4382A
Use of the Mute Control function is not mandatory but recommended for designs requiring the absolute min-
imum in extraneous clicks and pops. Also, use of the Mute Control function can enable the system designer
to achieve idle channel noise/signal-to-noise ratios which are only limited by the external mute circuit.
4.12
Recommended Power-Up Sequence
4.12.1
Hardware Mode
1.
Hold RST low until the power supplies and configuration pins are stable, and the master and left/right
clocks are locked to the appropriate frequencies, as discussed in Section 4.1. In this state, the
registers are reset to the default settings, FILT+ will remain low, and VQ will be connected to VA/2.
If RST can not be held low long enough the SDINx pins should remain static low until all other clocks
are stable, and if possible the RST should be toggled low again once the system is stable.
2.
Bring RST high. The device will remain in a low power state with FILT+ low and will initiate the
Hardware power-up sequence after approximately 512 LRCK cycles in Single-Speed Mode (1024
LRCK cycles in Double-Speed Mode, and 2048 LRCK cycles in Quad-Speed Mode).
4.12.2
Software Mode
1.
Hold RST low until the power supply is stable, and the master and left/right clocks are locked to the
appropriate frequencies, as discussed in Section 4.1. In this state, the registers are reset to the default
settings; FILT+ will remain low, and VQ will be connected to VA/2.
2.
Bring RST high. The device will remain in a low-power state with FILT+ low for 512 LRCK cycles in
Single-speed Mode (1024 LRCK cycles in Double-speed Mode, and 2048 LRCK cycles in Quad-
speed Mode).
3.
In order to reduce the chances of clicks and pops, perform a write to the CP_EN bit prior to the
completion of approximately 512 LRCK cycles in Single-speed Mode (1024 LRCK cycles in Double-
speed Mode, and 2048 LRCK cycles in Quad-speed Mode). The desired register settings can be
loaded while keeping the PDN bit set to 1. Set the RMP_UP and RMP_DN bits to 1; then set the
format and mode control bits to the desired settings.
If more than the stated number of LRCK cycles passes before CPEN bit is written, the chip will enter
Hardware Mode and begin to operate with the M0-M3 as the mode settings. CPEN bit may be written
at anytime, even after the Hardware sequence has begun. It is advised that if the CPEN bit cannot be
set in time, the SDINx pins should remain static low (this way, no audio data can be converted
incorrectly by the Hardware Mode settings).
4.
Set the PDN bit to 0. This will initiate the power-up sequence, which lasts approximately 50 s.
Figure 17. Recommended Mute Circuitry
相關PDF資料 |
PDF描述 |
|---|---|
| 0210490183 | CABLE JUMPER 1.25MM .229M 12POS |
| VE-B3V-EY | CONVERTER MOD DC/DC 5.8V 50W |
| UPTW6181MRD | CAP ALUM 180UF 420V 20% RADIAL |
| CDB4362A | BOARD EVAL FOR CS4362A DAC |
| YLCDRSK1668S | KIT DEMONSTRATION LCD H8SX1668 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CDB4383 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:114 dB, 192 kHz 8-Channel D/A Converter |
| CDB4384 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 8-Ch DAC w/DSD RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4385 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 8-Ch DAC w/DSD RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4390 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, Stereo D/A Converter for Digital Audio |
| CDB4391 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
發(fā)布緊急采購，3分鐘左右您將得到回復。