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參數(shù)資料
| 型號： | CD4070BE |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | CMOS Quad Exclusive-OR and Exclusive-NOR Gate |
| 中文描述： | 的CMOS四異或及異或非門 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 68K |
| 代理商： | CD4070BE |
7
CD4070B, CD4077B
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
NOTES:
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
bbb
C A - B
S
c
Q
L
A
SEATING
BASE
D
PLANE
-D-
-A-
-C-
-B-
α
D
E
S1
b2
b
A
e
M
c1
b1
(c)
(b)
SECTION A-A
BASE
LEAD FINISH
METAL
eA/2
A
M
S
ccc
C A - B
M
D
S
aaa
C A - B
M
D
S
eA
F14.3 MIL-STD-1835 GDIP1-T14 (D-1, CONFIGURATION A)
14 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.200
-
5.08
-
b
0.014
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D
-
0.785
-
19.94
5
E
0.220
0.310
5.59
7.87
5
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
-
eA/2
0.150 BSC
3.81 BSC
-
L
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
6
S1
0.005
-
0.13
-
7
α
90o
105o
90o
105o
-
aaa
-
0.015
-
0.38
-
bbb
-
0.030
-
0.76
-
ccc
-
0.010
-
0.25
-
M
-
0.0015
-
0.038
2, 3
N14
14
8
Rev. 0 4/94
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CD4070BE | 制造商:Texas Instruments 功能描述:IC 4000 CMOS 4070 DIP14 18V |
| CD4070BEE4 | 功能描述:邏輯門 Quad Exclusive RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| CD4070BEG4 | 功能描述:IC GATE XOR 4CH 2-INP 14-DIP 制造商:texas instruments 系列:4000B 包裝:管件 零件狀態(tài):在售 邏輯類型:XOR（異或） 電路數(shù):4 輸入數(shù):2 特性:- 電壓 - 電源:3 V ~ 18 V 電流 - 靜態(tài)（最大值）:1μA 電流 - 輸出高，低:3.4mA，3.4mA 邏輯電平 - 低:1.5 V ~ 4 V 邏輯電平 - 高:3.5 V ~ 11 V 不同 V，最大 CL 時的最大傳播延遲:100ns @ 15V，50pF 工作溫度:-55°C ~ 125°C 安裝類型:通孔 供應商器件封裝:14-PDIP 封裝/外殼:14-DIP（0.300"，7.62mm） 基本零件編號:4070 標準包裝:25 |
| CD4070BEX | 制造商:Harris Corporation 功能描述: 制造商:Harris Corporation 功能描述:Logic Circuit, Quad 2-Input XOR, CMOS, 14 Pin, Plastic, DIP 制造商:RCA 功能描述:Logic Circuit, Quad 2-Input XOR, CMOS, 14 Pin, Plastic, DIP |
| CD4070BF | 制造商:Texas Instruments 功能描述:XOR Gate 4-Element 2-IN CMOS 14-Pin CDIP Tube 制造商:Rochester Electronics LLC 功能描述:QUAD EXCLUSIVE-OR GATE - Bulk 制造商:Texas Instruments 功能描述:XOR GATE 4-ELEM 2-IN CMOS 14CDIP - Rail/Tube |
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