參數(shù)資料
型號: CD4070BM
廠商: Texas Instruments, Inc.
英文描述: Dual Differential Comparator 20-LCCC -55 to 125
中文描述: 的CMOS四異或及異或非門
文件頁數(shù): 1/8頁
文件大小: 68K
代理商: CD4070BM
1
Data sheet acquired from Harris Semiconductor
SCHS055
Features
High-Voltage Types (20V Rating)
CD4070B - Quad Exclusive-OR Gate
CD4077B - Quad Exclusive-NOR Gate
Medium Speed Operation
-tPHL, tPLH = 65ns (Typ) at VDD = 10V, CL = 50pF
100% Tested for Quiescent Current at 20V
Standardized Symmetrical Output Characteristics
5V, 10V and 15V Parametric Ratings
Maximum Input Current of 1
A at 18V Over Full
Package Temperature Range
- 100nA at 18V and 25oC
Noise Margin (Over Full Package Temperature Range)
- 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V
Meets All Requirements of JEDEC Standard No. 13B,
“Standard Specications for Description of ‘B’ Series
CMOS Devices
Applications
Logical Comparators
Adders/Subtractors
Parity Generators and Checkers
Description
The Harris CD4070B contains four independent Exclusive-
OR gates. The Harris CD4077B contains four independent
Exclusive-NOR gates.
The CD4070B and CD4077B provide the system designer
with a means for direct implementation of the Exclusive-OR
and Exclusive-NOR functions, respectively.
Pinouts
Ordering Information
PART NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
CD4070BE
-55 to 125
14 Ld PDIP
E14.3
CD4077BE
-55 to 125
14 Ld PDIP
E14.3
CD4070BF
-55 to 125
14 Ld CERDIP
F14.3
CD4077BF
-55 to 125
14 Ld CERDIP
F14.3
CD4070BM
-55 to 125
14 Ld SOIC
M14.15
CD4077BM
-55 to 125
14 Ld SOIC
M14.15
CD4070B
(PDIP, CERDIP, SOIC)
TOP VIEW
CD4077B
(PDIP, CERDIP, SOIC)
TOP VIEW
A
B
J = A
B
K = C
D
C
D
VSS
VDD
H
G
M = G
H
L = E
F
F
E
1
2
3
4
5
6
7
14
13
12
11
10
9
8
A
B
J = A
B
K = C
D
C
D
VSS
VDD
H
G
M = G
H
L = E
F
F
E
1
2
3
4
5
6
7
14
13
12
11
10
9
8
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1998
CD4070B,
CD4077B
CMOS Quad Exclusive-OR
and Exclusive-NOR Gate
File Number
910.1
[ /Title
(CD40
70B,
CD407
7B)
/Sub-
ject
(CMO
S Quad
Exclu-
sive-
OR
and
Exclu-
sive-
NOR
Gate)
/Autho
r ()
/Key-
words
(Har-
ris
Semi-
con-
ductor,
CD400
0,
metal
gate,
CMOS
, pdip,
cerdip,
mil,
January 1998
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