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參數(shù)資料
| 型號(hào)： | CCU3000-I |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Central Control Unit |
| 中文描述： | MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 8/77頁 |
| 文件大?。?/td> | 837K |
| 代理商： | CCU3000-I |
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CCU 3000, CCU 3000-I
CCU 3001, CCU 3001-I
MICRONAS INTERMETALL
8
2.9. Reset Function
The internal reset provides a correct basic setup of the
complete hardware on the chip. For this the internal con-
trol register is loaded during reset. One reserved byte in
the ROM is accessed by the reset circuit and its content
is copied into the control register. The internal voltage
supervision resets the IC if the voltage is too low. The re-
set pin is also used as output for internal reset sources
(watchdog, power-down detector, clock supervisor). In-
ternal resistors limit the maximum current.
2.10. Control Register (address 201H)
This is a combination of control switches in an 8-bit reg-
ister. During reset it is loaded with the contents of the ad-
dress FFF9H, but it can also be read and written via soft-
ware. The controller starts operation with the setting
dictated by reset. The switches have the following func-
tions:
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5 to 7
CPU_disable
RAM_disable
ROM_disable
R/W-mode P4
Bus external
set to 1
(low active)
(low active)
(low active)
(low active)
(low active)
The setting at the R/W-pin decides whether the control
word is read internally or externally. Bit 0 to bit 2 are the
switches which can disable RAM, ROM and CPU. For
external access a pull-up resistor must be connected to
the R/W pin (CCU 3001). Bit 4 switches P1, P2 and P3
into the system bus mode. If the internal CPU is active,
the direction of the data bus drivers is automatically set
correctly, so that no additional decoding is necessary. Bit
3 switches P4 into the R/W mode. If no external write ac-
cess is necessary, (ext. EPROM), P4 can stay in the port
mode.
OSC
Prescaler
Reset +
Control–
word
Logic
Internal
Reset
Voltage
Detector
300 k
X1
X2
22 p
22 p
CCU 3000, CCU 3001
V
SUP
Φ
2
RES
D
0
...D
7
A
0
...A
15
Supervision
Clock
Watchdog
RESET
CLKRES
RESIN
POR
RESOUT
DOGBIT
Fig. 2–6:
Oscillator and reset
C
1
=
C
2
=
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