參數(shù)資料
型號(hào): CBTL06DP211EE
廠商: NXP SEMICONDUCTORS
元件分類: 編、解碼器及復(fù)用、解復(fù)用
英文描述: DisplayPort Gen1 2 : 1 multiplexer
中文描述: MULTIPLEXER, PBGA48
封裝: 5 X 5 MM, 0.80 MM HEIGHT, LEAD FREE, PLASTIC, TFBGA-48
文件頁數(shù): 18/18頁
文件大?。?/td> 144K
代理商: CBTL06DP211EE
CBTL06DP211
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 21 February 2011
9 of 18
NXP Semiconductors
CBTL06DP211
DisplayPort Gen1 2 : 1 multiplexer
10. Characteristics
10.1 General characteristics
10.2 DisplayPort channel characteristics
Table 9.
General characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
IDD
supply current
operating mode (XSD = HIGH); VDD =3.3 V
-
0.2
1
mA
shutdown mode (XSD = LOW); VDD = 3.3 V
--10
μA
Pcons
power consumption
operating mode (XSD = HIGH); VDD = 3.3 V
--5
mW
tstartup
start-up time
supply voltage valid or XSD going HIGH to
channel specified operating characteristics
--1
ms
trcfg
reconfiguration time
GPU_SEL or DDC_AUX_SEL state change
to channel specified operating characteristics
--1
ms
Table 10.
DisplayPort channel characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VI
input voltage
0.3
-
+2.6
V
VIC
common-mode input voltage
0
-
2.0
V
VID
differential input voltage
-
1.2
V
DDIL
differential insertion loss
channel is on; f = 100 MHz
-
1.6
-
dB
channel is on; f = 1.5 GHz
-
2.7
-
dB
channel is off; 0 Hz
≤ f ≤ 1.5 GHz
-
35
-
dB
DDRL
differential return loss
channel is on; 0 Hz
≤ f ≤ 1.5 GHz
-
10
-
dB
DDNEXT differential near-end crosstalk
adjacent channels are on;
0Hz
≤ f ≤ 1.5 GHz
-
40
-
dB
B
bandwidth
3.0 dB intercept
-
2.0
-
GHz
tPD
propagation delay
from left-side port to right-side port
or vice versa
-100
-ps
tsk(dif)
differential skew time
intra-pair
-
5
-
ps
tsk
skew time
inter-pair
-
180
ps
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