參數(shù)資料
型號: CBTL01023GM
廠商: NXP Semiconductors N.V.
元件分類: 編、解碼器及復(fù)用、解復(fù)用
英文描述: 3.3 V, one differential channel, 2 : 1 multiplexer-demultiplexer switch for PCI Express Gen3
封裝: CBTL01023GM<SOT1049|<<<1<Always Pb-free,;
文件頁數(shù): 10/14頁
文件大?。?/td> 124K
代理商: CBTL01023GM
CBTL01023
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 October 2011
5 of 14
NXP Semiconductors
CBTL01023
3.3 V, one differential channel, 2 : 1 MUX/deMUX switch for PCIe Gen3
11. Dynamic characteristics
[1]
Typical values are at VDD = 3.3 V; Tamb =25 C, and maximum loading.
Table 7.
Dynamic characteristics
VDD =3.3 V 10 %; Tamb = 40 C to +85 C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ[1]
Max
Unit
DDIL
differential insertion loss
channel is OFF
f=4GHz
-
30
-
dB
f=100MHz
-
65
-
dB
channel is ON
f=4GHz
-
1.5
-
dB
f=100MHz
-
0.6
-
dB
B3dB
3 dB bandwidth
-
9
-
GHz
DDRL
differential return loss
f = 4 GHz
-
7.5
-
dB
f=100MHz
-
24
-
dB
Ron
ON-state resistance
VDD =3.3 V; VI =2V;
II =19mA
-6
-
Cio(on)
on-state input/output capacitance
-
1.5
-
pF
tPD
propagation delay
from Port A to Port B, or
Port A to Port C, or vice versa
-60
-ps
Switching characteristics
tstartup
start-up time
supply voltage valid or
XSD going LOW to channel
specified operating conditions
--
10
ms
tPZH
OFF-state to HIGH propagation delay
-
300
ns
tPZL
OFF-state to LOW propagation delay
-
70
ns
tPHZ
HIGH to OFF-state propagation delay
-
50
ns
tPLZ
LOW to OFF-state propagation delay
-
50
ns
tsk(dif)
differential skew time
intra-pair
-
5
-
ps
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