- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄298944 > CAT93C66ZD4E-1.8-GT3REVE (ON SEMICONDUCTOR) 256 X 16 MICROWIRE BUS SERIAL EEPROM, DSO8 PDF資料下載
參數(shù)資料
| 型號(hào)： | CAT93C66ZD4E-1.8-GT3REVE |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | PROM |
| 英文描述： | 256 X 16 MICROWIRE BUS SERIAL EEPROM, DSO8 |
| 封裝： | 3 X 3 MM, GREEN, MO-229C, TDFN-8 |
| 文件頁(yè)數(shù)： | 14/17頁(yè) |
| 文件大?。?/td> | 196K |
| 代理商： | CAT93C66ZD4E-1.8-GT3REVE |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)當(dāng)前第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)
CAT93C66
Doc. No. MD-1089 Rev. S
6
2008 SCILLC. All rights reserved
Characteristics subject to change without notice
Read
Upon receiving a READ command and an address
(clocked into the DI pin), the DO pin of the CAT93C66
will come out of the high impedance state and, after
sending an initial dummy zero bit, will begin shifting
out the data addressed (MSB first). The output data
bits will toggle on the rising edge of the SK clock and
are stable after the specified time delay (tPD0 or tPD1).
For the CAT93C66, after the initial data word has
been shifted out and CS remains asserted with the SK
clock continuing to toggle, the device will auto-
matically increment to the next address and shift out
the next data word in a sequential READ mode. As
long as CS is continuously asserted and SK continues
to toggle, the device will keep incrementing to the next
address automatically until it reaches to the end of the
address space, then loops back to address 0. In the
sequential READ mode, only the initial data word is
preceeded by a dummy zero bit. All subsequent data
words will follow without a dummy zero bit. The READ
instruction timing is illustrated in Figure 2.
Erase/Write Enable and Disable
The CAT93C66 powers up in the write disable state. Any
writing after power-up or after an EWDS (erase/write
disable) instruction must first be preceded by the EWEN
(erase/write
enable)
instruction.
Once
the
write
instruction is enabled, it will remain enabled until power
to the device is removed, or the EWDS instruction is
sent. The EWDS instruction can be used to disable all
CAT93C66 write and erase instructions, and will prevent
any accidental writing or clearing of the device. Data can
be read normally from the device regardless of the write
enable/disable
status.
The
EWEN
and
EWDS
instructions timing is shown in Figure 3.
Figure 1. Sychronous Data Timing
Figure 2. READ Instruction Timing
SK
CS
DI
DO
HIGH-Z
11
0
AN AN–1
A0
Dummy 0
D15 . . . D0
or
D7 . . . D0
Address + 1
D15 . . . D0
or
D7 . . . D0
Address + 2
D15 . . . D0
or
D7 . . . D0
Address + n
D15 . . .
or
D7 . . .
Don't Care
tPD0
SK
DI
CS
DO
tDIS
tPD0,tPD1
tCSMIN
tCSS
tDIS
tDIH
tSKHI
tCSH
VALID
DATA VALID
tSKLOW
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CAT93C86UI-1.8TE13REVC | 1K X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| CATZ-A6B3-FREQ | TCXO, CLOCK, 1 MHz - 200 MHz, HCMOS OUTPUT |
| CAT-A6B3-FREQ | TCXO, CLOCK, 1 MHz - 200 MHz, HCMOS OUTPUT |
| CAVZ-ABBP-FREQ | VCXO, CLOCK, 1 MHz - 200 MHz, HCMOS OUTPUT |
| CB100H2AA4-12 | 100 A, SILICON, RECTIFIER DIODE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT93C66ZD4I | 制造商:Catalyst Semiconductor 功能描述: |
| CAT93C76LI-G | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (1024x8)/(512x16) 8K RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT93C76VGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT93C76VGI-T3 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT93C76VI-G | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (1024x8)/(512x16) 8K RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。