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參數(shù)資料
| 型號： | CAT93C66ZD4E-1.8-GT3REVE |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | PROM |
| 英文描述： | 256 X 16 MICROWIRE BUS SERIAL EEPROM, DSO8 |
| 封裝： | 3 X 3 MM, GREEN, MO-229C, TDFN-8 |
| 文件頁數(shù)： | 13/17頁 |
| 文件大?。?/td> | 196K |
| 代理商： | CAT93C66ZD4E-1.8-GT3REVE |
CAT93C66
2008 SCILLC. All rights reserved
5
Doc. No. MD-1089 Rev. S
Characteristics subject to change without notice
POWER-UP TIMING
(1) (2)
Symbol
Parameter
Max
Units
tPUR
Power-up to Read Operation
1
ms
tPUW
Power-up to Write Operation
1
ms
Notes
:
(1)
These parameters are tested initially and after a design or process change that affects the parameter according to appropriate
AEC-Q100 and JEDEC test methods.
(2)
tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
A.C. TEST CONDITIONS
Input Rise and Fall Times
≤ 50 ns
Input Pulse Voltages
0.4V to 2.4V
4.5V
≤ V
CC ≤ 5.5V
Timing Reference Voltages
0.8V, 2.0V
4.5V
≤ V
CC ≤ 5.5V
Input Pulse Voltages
0.2VCC to 0.7VCC
1.8V
≤ V
CC ≤ 4.5V
Timing Reference Voltages
0.5VCC
1.8V
≤ V
CC ≤ 4.5V
Output Load
Current Source IOLmax/IOHmax; CL=100pF
DEVICE OPERATION
The CAT93C66 is a 4096-bit nonvolatile memory
intended for use with industry standard micropro–
cessors. The CAT93C66 can be organized as either
registers of 16 bits or 8 bits. When organized as X16,
seven 11-bit instructions control the reading, writing and
erase operations of the device. When organized as X8,
seven 12-bit instructions control the reading, writing and
erase operations of the device. The CAT93C66 operates
on a single power supply and will generate on chip, the
high voltage required during any write operation.
Instructions, addresses, and write data are clocked
into the DI pin on the rising edge of the clock (SK).
The DO pin is normally in a high impedance state
except when reading data from the device, or when
checking the ready/busy status after a write operation.
The serial communication protocol follows the timing
shown in Figure 1.
The ready/busy status can be determined after the start
of internal write cycle by selecting the device (CS high)
and polling the DO pin; DO low indicates that the write
operation is not completed, while DO high indicates that
the device is ready for the next instruction. If necessary,
the DO pin may be placed back into a high impedance
state during chip select by shifting a dummy “1” into the
DI pin. The DO pin will enter the high impedance state
on the rising edge of the clock (SK). Placing the DO pin
into the high impedance state is recommended in
applications where the DI pin and the DO pin are to be
tied together to form a common DI/O pin.
The format for all instructions sent to the device is a
logical “1” start bit, a 2-bit (or 4-bit) opcode, 8-bit
address (an additional bit when organized X8) and for
write operations a 16-bit data field (8-bit for X8
organizations). The instruction format is shown in
Instruction Set table.
INSTRUCTION SET
Address
Data
Instruction
Start
Bit
Opcode
x8
x16
x8
x16
Comments
READ
1
10
A8-A0
A7-A0
Read Address AN – A0
ERASE
1
11
A8-A0
A7-A0
Clear Address AN – A0
WRITE
1
01
A8-A0
A7-A0
D7-D0
D15-D0
Write Address AN – A0
EWEN
1
00
11XXXXXXX
11XXXXXX
Write Enable
EWDS
1
00
00XXXXXXX
00XXXXXX
Write Disable
ERAL
1
00
10XXXXXXX
10XXXXXX
Clear All Addresses
WRAL
1
00
01XXXXXXX
01XXXXXX
D7-D0
D15-D0
Write All Addresses
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT93C66ZD4I | 制造商:Catalyst Semiconductor 功能描述: |
| CAT93C76LI-G | 功能描述:電可擦除可編程只讀存儲器 (1024x8)/(512x16) 8K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT93C76VGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT93C76VGI-T3 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT93C76VI-G | 功能描述:電可擦除可編程只讀存儲器 (1024x8)/(512x16) 8K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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