Table 4. DC ELECTRICAL CHARACTERISTICS (VCC
參數(shù)資料
型號(hào): CAT5112YI-00-GT3
廠商: ON Semiconductor
文件頁(yè)數(shù): 5/10頁(yè)
文件大?。?/td> 0K
描述: IC POT DGTL 100L 32TAP 8TSSOP
標(biāo)準(zhǔn)包裝: 3,000
系列: DPP
接片: 32
電阻(歐姆): 100k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 300 ppm/°C
存儲(chǔ)器類型: 非易失
接口: 3 線串行(芯片選擇,遞增,增/減)
電源電壓: 2.5 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 8-TSSOP
包裝: 帶卷 (TR)
CAT5112
http://onsemi.com
4
Table 4. DC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V to +6 V unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
POWER SUPPLY
VCC
Operating Voltage Range
2.5
6
V
ICC1
Supply Current (Increment)
VCC = 6 V, f = 1 MHz, IW = 0
200
mA
VCC = 6 V, f = 250 kHz, IW = 0
100
mA
ICC2
Supply Current (Write)
Programming, VCC = 6 V
1000
mA
VCC = 3 V
500
mA
ISB1 (Note 4)
Supply Current (Standby)
CS = VCC 0.3 V
U/D, INC = VCC 0.3 V or GND
75
150
mA
LOGIC INPUTS
IIH
Input Leakage Current
VIN = VCC
10
mA
IIL
Input Leakage Current
VIN = 0 V
10
mA
VIH1
TTL High Level Input Voltage
4.5 V VCC 5.5 V
2
VCC
V
VIL1
TTL Low Level Input Voltage
0
0.8
V
VIH2
CMOS High Level Input Voltage
2.5 V VCC 6 V
VCC x 0.7
VCC + 0.3
V
VIL2
CMOS Low Level Input Voltage
0.3
VCC x 0.2
V
POTENTIOMETER CHARACTERISTICS
RPOT
Potentiometer Resistance
10 Device
10
kW
50 Device
50
00 Device
100
Pot. Resistance Tolerance
20
%
VRH
Voltage on RH pin
0
VCC
V
VRL
Voltage on RL pin
0
VCC
V
Resolution
1
%
INL
Integral Linearity Error
IW 2 mA
0.5
1
LSB
DNL
Differential Linearity Error
IW 2 mA
0.25
0.5
LSB
ROUT
Buffer Output Resistance
0.05 VCC VWB 0.95 VCC,
VCC = 5 V
1
W
IOUT
Buffer Output Current
0.05 VCC VWB 0.95 VCC,
VCC = 5 V
3
mA
TCRPOT
TC of Pot Resistance
300
ppm/C
TCRATIO
Ratiometric TC
20
ppm/C
CRH/CRL/CRW
Potentiometer Capacitances
8/8/25
pF
fc
Frequency Response
Passive Attenuator, 10 kW
1.7
MHz
VWB(SWING)
Output Voltage Range
IOUT 100 mA, VCC = 5 V
0.01 VCC
0.99 VCC
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1 V to VCC + 1 V
5. IW = source or sink
6. These parameters are periodically sampled and are not 100% tested.
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