參數(shù)資料
型號: CAT150089RWI-GT3
廠商: ON SEMICONDUCTOR
元件分類: PROM
英文描述: 8K X 1 SPI BUS SERIAL EEPROM, PDSO8
封裝: 0.150 INCH, HALOGEN FREE AND ROHS COMPLIANT, MS-012, SOIC-8
文件頁數(shù): 9/15頁
文件大?。?/td> 174K
代理商: CAT150089RWI-GT3
CAT15008, CAT15016
2008 SCILLC. All rights reserved.
3
Doc. No. MD-1125 Rev. B
Characteristics subject to change without notice
A.C. CHARACTERISTICS (MEMORY)
(1)
VCC = 2.5V to 5.5V, TA = -40°C to 85°C, unless otherwise specified.
Symbol
Parameter
Min.
Max.
Units
fSCK
Clock Frequency
DC
10
MHz
tSU
Data Setup Time
20
ns
tH
Data Hold Time
20
ns
tWH
SCK High Time
40
ns
tWL
SCK Low Time
40
ns
tLZ
HOLD
to Output Low Z
25
ns
tRI
(2)
Input Rise Time
2
s
tFI
(2)
Input Fall Time
2
s
tHD
HOLD
Setup Time
0
ns
tCD
HOLD
Hold Time
10
ns
tV
Output Valid from Clock Low
40
ns
tHO
Output Hold Time
0
ns
tDIS
Output Disable Time
20
ns
tHZ
HOLD
to Output High Z
25
ns
tCS
CS
High Time
15
ns
tCSS
CS
Setup Time
15
ns
tCSH
CS
Hold Time
15
ns
tWPS
WP
Setup Time
10
ns
tWPH
WP
Hold Time
10
ns
tWC
(4)
Write Cycle Time
5
ms
tPU
(2) (3)
Power-up to Ready Mode
1
ms
Notes
:
(1)
Test conditions according to “A.C. Test Conditions” table.
(2)
Tested initially and after a design or process change that affects this parameter.
(3)
tPU is the delay between the time VCC is stable and the device is ready to accept commands.
(4)
tWC is the time from the rising edge of CS
after a valid write sequence to the end of the internal write cycle.
A.C. TEST CONDITIONS
Input Rise and Fall Times
≤ 10ns
Input Levels
0.3 VCC to 0.7 VCC
Timing Reference Levels
0.5 VCC
Output Load
Current Source: IOL max/ IOH max; CL = 50pF
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