參數(shù)資料
型號(hào): CAT150089RWI-GT3
廠商: ON SEMICONDUCTOR
元件分類: PROM
英文描述: 8K X 1 SPI BUS SERIAL EEPROM, PDSO8
封裝: 0.150 INCH, HALOGEN FREE AND ROHS COMPLIANT, MS-012, SOIC-8
文件頁數(shù): 2/15頁
文件大小: 174K
代理商: CAT150089RWI-GT3
CAT15008, CAT15016
Doc. No. MD-1125 Rev. B
10
2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
Write Status Register
The Status Register is written by sending a WRSR
instruction according to timing shown in Figure 8. Only
bits 2, 3 and 7 can be written using the WRSR
command.
Write Protection
The Write Protect (WP
) pin can be used to protect the
Block Protect bits BP0 and BP1 against being
inadvertently altered. When WP
is low and the WPEN
bit is set to “1”, write operations to the Status Register
are inhibited. WP
going low while CS
is still low will
interrupt a write to the status register. If the internal
write cycle has already been initiated, WP
going low
will have no effect on any write operation to the Status
Register. The WP
pin function is blocked when the
WPEN bit is set to “0”. The WP
input timing is shown
in Figure 9.
Figure 8. WRSR Timing
Note: Dashed Line = mode (1, 1) - - - - - -
Figure 9. WP
Timing
Note: Dashed Line = mode (1, 1) - - - - - -
01
2
3
4
5
6
78
10
911
12
13
14
SCK
SI
MSB
HIGH IMPEDANCE
DATA IN
15
SO
CS
7
6
5
4
3
2
10
00
0
1
OPCODE
CS
SCK
WP
t WPS
t WPH
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