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參數(shù)資料
| 型號： | CAT1026ZD4I-25-T2 |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | 3 X 3 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, MO-229, TDFN-8 |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 241K |
| 代理商： | CAT1026ZD4I-25-T2 |
CAT1026, CAT1027
Doc. No. MD-3010 Rev. M
12
Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Acknowledge Polling
Disabling of the inputs can be used to take
advantage of the typical write cycle time. Once the
stop condition is issued to indicate the end of the
host’s write opration, the CAT1026 and CAT1027
initiates the internal write cycle. ACK polling can be
initiated immediately. This involves issuing the start
condition followed by the slave address for a write
operation. If the device is still busy with the write
operation, no ACK will be returned. If a write
operation has completed, an ACK will be returned
and the host can then proceed with the next read or
write operation.
READ OPERATIONS
The READ operation for the CAT1026 and CAT1027 is
initiated in the same manner as the write operation with
one exception, the R/W
bit is set to one. Three different
READ operations are possible: Immediate/Current
Address
READ,
Selective/Random
READ
and
Sequential READ.
Figure 10. Immediate Address Read Timing
SCL
SDA
8TH BI T
STOP
NO ACK
DATA OUT
89
SLAVE
ADDRESS
S
A
C
K
DATA
N
O
A
C
K
S
T
O
P
BUS ACTIVIT Y:
MASTER
SDA LINE
S
T
A
R
T
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