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參數(shù)資料
| 型號： | CAT1026ZD4I-25-T2 |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | 3 X 3 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, MO-229, TDFN-8 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 241K |
| 代理商： | CAT1026ZD4I-25-T2 |
CAT1026, CAT1027
Catalyst Semiconductor, Inc.
11
Doc. No. MD-3010 Rev. M
Characteristics subject to change without notice
Page Write
The CAT1026 and CAT1027 write up to 16 bytes of
data in a single write cycle, using the Page Write
operation. The page write operation is initiated in the
same manner as the byte write operation, however
instead of terminating after the initial byte is
transmitted, the Master is allowed to send up to 15
additional bytes. After each byte has been transmitted,
the CAT1026 and CAT1027 will respond with an
acknowledge and internally increment the lower order
address bits by one. The high order bits remain
unchanged.
If the Master transmits more than 16 bytes before
sending the STOP condition, the address counter
‘wraps around,’ and previously transmitted data will be
overwritten.
When all 16 bytes are received, and the STOP condition
has been sent by the Master, the internal programming
cycle begins. At this point, all received data is written to
the CAT1026 and CAT1027 in a single write cycle.
Figure 8. Byte Write Timing
Figure 9: Page Write Timing
BYTE
ADDRESS
SLAVE
ADDRESS
S
A
C
K
A
C
K
DATA
A
C
K
S
T
O
P
BUS ACTIVITY:
MASTER
SDA LINE
S
T
A
R
T
BUS ACTIVITY:
MASTER
SDA LINE
DATA n+15
BYTE
ADDRESS (n)
A
C
K
A
C
K
DATA n
A
C
K
S
T
O
P
S
A
C
K
DATA n+1
A
C
K
S
T
A
R
T
P
SLAVE
ADDRESS
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